公开(公告)号：US20180330983A1

公开(公告)日：2018-11-15

申请号：US15775924

申请日：2016-11-15

Applicant: Charles R. LOTTES ,  SunEdison Semiconductor Limited

Inventor： Gang Wang ,  Charles R. Lottes ,  Sasha Kweskin

IPC: H01L21/762 ,  H01L21/02 ,  H01L27/146

Abstract: A method is provided for preparing semiconductor structure, e.g., a semiconductor on insulator structure, comprising a device layer having a smooth surface. The method provided involves smoothing a semiconductor substrate surface by making use of stress enhanced surface diffusion at elevated temperatures. The purpose of this method is to reach atomic scale surface smoothness (for example, smoothness in the range of between 1.0 and 1.5 angstroms as measured according to root mean square over a 30 um×30 um AFM measurement), which is required in advanced (sub 28 nm) CMOS device fabrication.

公开(公告)号：US10068795B2

公开(公告)日：2018-09-04

申请号：US15119304

申请日：2015-01-09

Applicant: SunEdison Semiconductor Limited (UEN201334164H)

Inventor： Michael J. Ries ,  Jeffrey Louis Libbert ,  Charles R. Lottes

IPC: H01L21/30 ,  H01L21/46 ,  H01L21/00 ,  H01L21/762 ,  H01L23/00 ,  H01L21/04 ,  H01L21/225 ,  H01L21/265

Abstract: Methods for preparing layered semiconductor structures are disclosed. The methods may involve pretreating an ion-implanted donor wafer by annealing the ion-implanted donor wafer to cause a portion of the ions to out-diffuse prior to wafer bonding. The donor structure may be bonded to a handle structure and cleaved without re-implanting ions into the donor structure.

公开(公告)号：US20170025307A1

公开(公告)日：2017-01-26

申请号：US15119304

申请日：2015-01-09

Applicant: SUNEDISON SEMICONDUCTOR LIMITED

Inventor： Michael J. Ries ,  Jeffrey Louis Libbert ,  Charles R. Lottes

IPC: H01L21/762 ,  H01L23/00

CPC classification number: H01L21/76254 ,  H01L21/0455 ,  H01L21/2253 ,  H01L21/2258 ,  H01L21/265 ,  H01L24/83 ,  H01L2224/83054 ,  H01L2224/83085 ,  H01L2224/83236 ,  H01L2224/83893

Abstract: Methods for preparing layered semiconductor structures are disclosed. The methods may involve pretreating an ion-implanted donor wafer by annealing the ion-implanted donor wafer to cause a portion of the ions to out-diffuse prior to wafer bonding. The donor structure may be bonded to a handle structure and cleaved without re-implanting ions into the donor structure.

Abstract translation: 公开了制备层状半导体结构的方法。 所述方法可以包括通过退火离子注入的施主晶片来预处理离子注入的施主晶片，以使得一部分离子在晶片接合之前扩散。 供体结构可以结合到手柄结构并且在不将离子重新注入到供体结构内的情况下被切割。

公开(公告)号：US10529616B2

公开(公告)日：2020-01-07

申请号：US15775924

申请日：2016-11-15

Applicant: SUNEDISON SEMICONDUCTOR LIMITED ,  Charles R. Lottes

Inventor： Gang Wang ,  Charles R. Lottes ,  Sasha Kweskin

IPC: H01L21/76 ,  H01L21/762 ,  H01L21/02 ,  H01L27/146

Abstract: A method is provided for preparing semiconductor structure, e.g., a semiconductor on insulator structure, comprising a device layer having a smooth surface. The method provided involves smoothing a semiconductor substrate surface by making use of stress enhanced surface diffusion at elevated temperatures. The purpose of this method is to reach atomic scale surface smoothness (for example, smoothness in the range of between 1.0 and 1.5 angstroms as measured according to root mean square over a 30 um×30 um AFM measurement), which is required in advanced (sub 28 nm) CMOS device fabrication.