公开(公告)号：US20220320332A1

公开(公告)日：2022-10-06

申请号：US17694276

申请日：2022-03-14

Applicant: STMicroelectronics Pte Ltd

Inventor： Yean Ching YONG ,  Maurizio Gabriele CASTORINA ,  Voon Cheng NGWAN ,  Ditto ADNAN ,  Fadhillawati TAHIR ,  Churn Weng YIM

IPC: H01L29/78 ,  H01L29/06 ,  H01L29/40 ,  H01L21/764 ,  H01L21/765 ,  H01L29/66

Abstract: An integrated circuit transistor device includes a semiconductor substrate providing a drain, a first doped region buried in the semiconductor substrate providing a body and a second doped region in the semiconductor substrate providing a source. A trench extends into the semiconductor substrate and passes through the first and second doped regions. An insulated polygate region within the trench surrounds a polyoxide region that may have void inclusion. The polygate region is formed by a first gate lobe and second gate lobe on opposite sides of the polyoxide region. A pair of gate contacts are provided at each trench. The pair of gate contacts includes: a first gate contact extending into the first gate lobe at a location laterally offset from the void and a second gate contact extending into the second gate lobe at a location laterally offset from the void.

公开(公告)号：US20230238341A1

公开(公告)日：2023-07-27

申请号：US18079610

申请日：2022-12-12

Applicant: STMicroelectronics Pte Ltd

Inventor： Churn Weng YIM ,  Maurizio Gabriele CASTORINA ,  Voon Cheng NGWAN ,  Yean Ching YONG ,  Ditto ADNAN ,  Fadhillawati TAHIR

IPC: H01L23/00

CPC classification number: H01L24/05 ,  H01L24/03 ,  H01L2224/05073 ,  H01L2224/05573 ,  H01L2224/022 ,  H01L2224/0219 ,  H01L2224/03019 ,  H01L2224/03466 ,  H01L2224/03614 ,  H01L2224/03622 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05624 ,  H01L2224/05647

Abstract: A bonding pad for an integrated circuit is formed by a stack of bonding pad layers. A lower bonding pad layer is supported by a bonding pad support layer. A passivation layer extends over the lower bonding pad layer and includes a passivation opening at a portion of an upper surface of the lower bonding pad layer. An upper bonding pad layer rests on said passivation layer and in the passivation opening in contact with the lower bonding pad layer.