公开(公告)号：US20240407272A1

公开(公告)日：2024-12-05

申请号：US18671774

申请日：2024-05-22

Applicant: STMicroelectronics International N.V.

Inventor： Philippe BOIVIN ,  Simon JEANNOT

IPC: H10N70/20 ,  H10B63/10 ,  H10N70/00

Abstract: A device includes a phase change memory cell. The memory cell includes a first stack of layers including an intermediate layer of phase change material, a lower insulating layer and an upper insulating layer. The memory cell includes L-shaped first and second conductive elements. The first conductive element extends on a first side wall of the first stack. The second conductive element extends on the second side wall of the stack opposite to the first wall.

公开(公告)号：US20250159906A1

公开(公告)日：2025-05-15

申请号：US18935091

申请日：2024-11-01

Applicant: STMicroelectronics International N.V.

Inventor： Alain OSTROVSKY ,  Jerome DUBOIS ,  Latifa DESVOIVRES ,  Simon JEANNOT ,  Christian BOCCACCIO

IPC: H10B63/00 ,  H10B63/10 ,  H10N70/00 ,  H10N70/20

Abstract: A method manufactures a memory including at least one first phase-change memory cell, each first cell including a resistive element, a first metal layer, and a second layer made of a phase-change material, the first layer being located between the resistive element and the second layer. The method includes the forming of a level including the resistive element, the forming of a third metal layer on the level, the etching of the third layer, and then the forming of the second layer.