公开(公告)号：US20250159906A1

公开(公告)日：2025-05-15

申请号：US18935091

申请日：2024-11-01

Applicant: STMicroelectronics International N.V.

Inventor： Alain OSTROVSKY ,  Jerome DUBOIS ,  Latifa DESVOIVRES ,  Simon JEANNOT ,  Christian BOCCACCIO

IPC: H10B63/00 ,  H10B63/10 ,  H10N70/00 ,  H10N70/20

Abstract: A method manufactures a memory including at least one first phase-change memory cell, each first cell including a resistive element, a first metal layer, and a second layer made of a phase-change material, the first layer being located between the resistive element and the second layer. The method includes the forming of a level including the resistive element, the forming of a third metal layer on the level, the etching of the third layer, and then the forming of the second layer.

公开(公告)号：US20250143193A1

公开(公告)日：2025-05-01

申请号：US18923201

申请日：2024-10-22

Applicant: STMicroelectronics International N.V. ,  COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES

Inventor： Latifa DESVOIVRES ,  Jerome DUBOIS ,  Daniel BENOIT ,  Pascal GOURAUD

IPC: H10N70/00 ,  H10B63/10 ,  H10N70/20

Abstract: The present description relates to a method of manufacturing an electronic device comprising a phase-change memory cell, the method comprising: the forming of a first layer made of a resistive material; the forming of a stack of layers on the first layer, the stack comprising at least one second layer made of a phase-change material; the etching of the stack, said etching stopping when the first layer is reached around the location of the memory cell; the forming of a spacer on the side walls of the stack; then an etching of the first layer, so that the stack rests on a central portion of the first layer and that the spacer rests on a peripheral portion of the first layer.