公开(公告)号：US20180019195A1

公开(公告)日：2018-01-18

申请号：US15705543

申请日：2017-09-15

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： KyungHoon Lee ,  SangMi Park ,  KyoungIl Huh ,  DaeSik Choi

IPC: H01L23/498 ,  H01L23/36 ,  H01L25/065 ,  H01L25/00 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31

CPC classification number: H01L23/49816 ,  H01L21/561 ,  H01L23/3128 ,  H01L23/36 ,  H01L23/49822 ,  H01L24/96 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/04105 ,  H01L2224/11 ,  H01L2224/12105 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/32145 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/73209 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/81005 ,  H01L2224/94 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06548 ,  H01L2225/06582 ,  H01L2225/06589 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/18162 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/81

Abstract: A semiconductor device includes a semiconductor wafer including a plurality of first semiconductor die. An opening is formed partially through the semiconductor wafer. A plurality of second semiconductor die is disposed over a first surface of the semiconductor wafer. An encapsulant is disposed over the semiconductor wafer and into the opening leaving a second surface of the semiconductor wafer exposed. A portion of the second surface of the semiconductor wafer is removed to separate the first semiconductor die. An interconnect structure is formed over the second semiconductor die and encapsulant. A thermal interface material is deposited over the second surface of the first semiconductor die. A heat spreader is disposed over the thermal interface material. An insulating layer is formed over the first surface of the semiconductor wafer. A vertical interconnect structure is formed around the first semiconductor die. Conductive vias are formed through the first semiconductor die.

公开(公告)号：US20230275013A1

公开(公告)日：2023-08-31

申请号：US18304090

申请日：2023-04-20

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： SungSoo Kim ,  DaeHyeok Ha ,  SangMi Park

IPC: H01L23/498 ,  H01L23/00 ,  H01L23/552 ,  H05K1/02

CPC classification number: H01L23/49827 ,  H01L23/552 ,  H01L24/17 ,  H05K1/0216 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/141 ,  H01L2924/15311 ,  H01L2924/15313 ,  H01L2924/181 ,  H01L2924/3025

Abstract: A semiconductor device has a substrate with a plurality of conductive vias formed through the substrate in an offset pattern. An electrical component is disposed in a die attach area over a first surface of the substrate. The conductive vias are formed around the die attach area of the substrate. A first conductive layer is formed over the first surface of the substrate, and a second conductive layer is formed over the second surface. An encapsulant is deposited over the substrate and electrical component. The substrate is singulated through the conductive vias. A first conductive via has a greater exposed surface area than a second conductive via. A shielding layer is formed over the electrical component and in contact with a side surface of the conductive vias. The shielding layer may extend over a second surface of substrate opposite the first surface of the substrate.

公开(公告)号：US10665534B2

公开(公告)日：2020-05-26

申请号：US15705543

申请日：2017-09-15

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： KyungHoon Lee ,  SangMi Park ,  KyoungIl Huh ,  DaeSik Choi

IPC: H01L23/498 ,  H01L25/065 ,  H01L21/56 ,  H01L25/00 ,  H01L23/00 ,  H01L23/36 ,  H01L23/31

Abstract: A semiconductor device includes a semiconductor wafer including a plurality of first semiconductor die. An opening is formed partially through the semiconductor wafer. A plurality of second semiconductor die is disposed over a first surface of the semiconductor wafer. An encapsulant is disposed over the semiconductor wafer and into the opening leaving a second surface of the semiconductor wafer exposed. A portion of the second surface of the semiconductor wafer is removed to separate the first semiconductor die. An interconnect structure is formed over the second semiconductor die and encapsulant. A thermal interface material is deposited over the second surface of the first semiconductor die. A heat spreader is disposed over the thermal interface material. An insulating layer is formed over the first surface of the semiconductor wafer. A vertical interconnect structure is formed around the first semiconductor die. Conductive vias are formed through the first semiconductor die.

公开(公告)号：US20190318984A1

公开(公告)日：2019-10-17

申请号：US15955014

申请日：2018-04-17

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： SungSoo Kim ,  DaeHyeok Ha ,  SangMi Park

IPC: H01L23/498 ,  H01L23/00 ,  H01L23/552 ,  H05K1/02

Abstract: A semiconductor device has a substrate with a plurality of conductive vias formed through the substrate in an offset pattern. An electrical component is disposed in a die attach area over a first surface of the substrate. The conductive vias are formed around the die attach area of the substrate. A first conductive layer is formed over the first surface of the substrate, and a second conductive layer is formed over the second surface. An encapsulant is deposited over the substrate and electrical component. The substrate is singulated through the conductive vias. A first conductive via has a greater exposed surface area than a second conductive via. A shielding layer is formed over the electrical component and in contact with a side surface of the conductive vias. The shielding layer may extend over a second surface of substrate opposite the first surface of the substrate.