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公开(公告)号:US11894314B2
公开(公告)日:2024-02-06
申请号:US17447336
申请日:2021-09-10
Applicant: STATS ChipPAC Pte. Ltd.
Inventor: HunTeak Lee , Gwang Kim , Junho Ye , YouJoung Choi , MinKyung Kim , Yongwoo Lee , Namgu Kim
IPC: H01L23/52 , H01L23/552 , H01L23/31 , H01Q1/40 , H01L23/498 , H01L21/56
CPC classification number: H01L23/552 , H01L21/56 , H01L23/3128 , H01L23/49822 , H01Q1/40
Abstract: A semiconductor device has a substrate and an electrical component disposed over a surface of the substrate. An antenna interposer is disposed over the substrate. A first encapsulant is deposited around the antenna interposer. The first encapsulant has a high dielectric constant. The antenna interposer has a conductive layer operating as an antenna and an insulating layer having a low dielectric constant less than the high dielectric constant of the first encapsulant. The antenna interposer is made from an antenna substrate having a plurality of antenna interposers. Bumps are formed over the antenna substrate and the antenna substrate is singulated to make the plurality of antenna interposers. A second encapsulant is deposited over the electrical component. The second encapsulant has a low dielectric constant less than the high dielectric constant of the first encapsulant. A shielding layer is disposed over the second encapsulant.
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公开(公告)号:US20230081706A1
公开(公告)日:2023-03-16
申请号:US17447336
申请日:2021-09-10
Applicant: STATS ChipPAC Pte. Ltd.
Inventor: HunTeak Lee , Gwang Kim , Junho Ye , YouJoung Choi , MinKyung Kim , Yongwoo Lee , Namgu Kim
IPC: H01L23/552 , H01L23/31 , H01L21/56 , H01L23/498 , H01Q1/40
Abstract: A semiconductor device has a substrate and an electrical component disposed over a surface of the substrate. An antenna interposer is disposed over the substrate. A first encapsulant is deposited around the antenna interposer. The first encapsulant has a high dielectric constant. The antenna interposer has a conductive layer operating as an antenna and an insulating layer having a low dielectric constant less than the high dielectric constant of the first encapsulant. The antenna interposer is made from an antenna substrate having a plurality of antenna interposers. Bumps are formed over the antenna substrate and the antenna substrate is singulated to make the plurality of antenna interposers. A second encapsulant is deposited over the electrical component. The second encapsulant has a low dielectric constant less than the high dielectric constant of the first encapsulant. A shielding layer is disposed over the second encapsulant.
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公开(公告)号:US12211803B2
公开(公告)日:2025-01-28
申请号:US18390051
申请日:2023-12-20
Applicant: STATS ChipPAC Pte. Ltd.
Inventor: HunTeak Lee , Gwang Kim , Junho Ye , YouJoung Choi , MinKyung Kim , Yongwoo Lee , Namgu Kim
IPC: H01L23/52 , H01L21/56 , H01L23/31 , H01L23/498 , H01L23/552 , H01L23/64 , H01L23/66 , H01Q1/24 , H01Q1/40
Abstract: A semiconductor device has a substrate and an electrical component disposed over a surface of the substrate. An antenna interposer is disposed over the substrate. A first encapsulant is deposited around the antenna interposer. The first encapsulant has a high dielectric constant. The antenna interposer has a conductive layer operating as an antenna and an insulating layer having a low dielectric constant less than the high dielectric constant of the first encapsulant. The antenna interposer is made from an antenna substrate having a plurality of antenna interposers. Bumps are formed over the antenna substrate and the antenna substrate is singulated to make the plurality of antenna interposers. A second encapsulant is deposited over the electrical component. The second encapsulant has a low dielectric constant less than the high dielectric constant of the first encapsulant. A shielding layer is disposed over the second encapsulant.
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公开(公告)号:US20230074430A1
公开(公告)日:2023-03-09
申请号:US17447029
申请日:2021-09-07
Applicant: STATS ChipPAC Pte. Ltd.
Inventor: HunTeak Lee , Gwang Kim , Junho Ye
IPC: H01L21/48 , H01L21/56 , H01L23/60 , H01L23/00 , H01L25/065 , H01L25/00 , H01L23/498 , H01L23/31
Abstract: A semiconductor device has a substrate and a first component disposed over a first surface of the substrate. A connector is disposed over the first surface of the substrate. A first encapsulant is deposited over the first component while the connector remains outside of the first encapsulant. A shielding layer is formed over the first encapsulant while the connector remains outside of the shielding layer. A second component is disposed over a second surface of the substrate. A solder bump is disposed over the second surface of the substrate. A second encapsulant is deposited over the second surface of the substrate. An opening is formed through the second encapsulant to expose the solder bump. A solder ball is disposed in the opening. The solder ball and solder bump are reflowed to form a combined solder bump.
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公开(公告)号:US20240153783A1
公开(公告)日:2024-05-09
申请号:US18543992
申请日:2023-12-18
Applicant: STATS ChipPAC Pte. Ltd.
Inventor: HunTeak Lee , Gwang Kim , Junho Ye
IPC: H01L21/48 , H01L21/56 , H01L23/00 , H01L23/31 , H01L23/498 , H01L23/60 , H01L25/00 , H01L25/065
CPC classification number: H01L21/4853 , H01L21/561 , H01L21/565 , H01L23/3121 , H01L23/49811 , H01L23/60 , H01L24/81 , H01L24/97 , H01L25/0652 , H01L25/50 , H01L2224/81815 , H01L2924/1532
Abstract: A semiconductor device has a substrate and a first component disposed over a first surface of the substrate. A connector is disposed over the first surface of the substrate. A first encapsulant is deposited over the first component while the connector remains outside of the first encapsulant. A shielding layer is formed over the first encapsulant while the connector remains outside of the shielding layer. A second component is disposed over a second surface of the substrate. A solder bump is disposed over the second surface of the substrate. A second encapsulant is deposited over the second surface of the substrate. An opening is formed through the second encapsulant to expose the solder bump. A solder ball is disposed in the opening. The solder ball and solder bump are reflowed to form a combined solder bump.
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公开(公告)号:US20240128201A1
公开(公告)日:2024-04-18
申请号:US18390051
申请日:2023-12-20
Applicant: STATS ChipPAC Pte. Ltd.
Inventor: HunTeak Lee , Gwang Kim , Junho Ye , YouJoung Choi , MinKyung Kim , Yongwoo Lee , Namgu Kim
IPC: H01L23/552 , H01L21/56 , H01L23/31 , H01L23/498 , H01L23/64 , H01L23/66 , H01Q1/24 , H01Q1/40
CPC classification number: H01L23/552 , H01L21/56 , H01L23/3128 , H01L23/49816 , H01L23/49822 , H01L23/645 , H01L23/66 , H01Q1/243 , H01Q1/40 , H01L2223/6677
Abstract: A semiconductor device has a substrate and an electrical component disposed over a surface of the substrate. An antenna interposer is disposed over the substrate. A first encapsulant is deposited around the antenna interposer. The first encapsulant has a high dielectric constant. The antenna interposer has a conductive layer operating as an antenna and an insulating layer having a low dielectric constant less than the high dielectric constant of the first encapsulant. The antenna interposer is made from an antenna substrate having a plurality of antenna interposers. Bumps are formed over the antenna substrate and the antenna substrate is singulated to make the plurality of antenna interposers. A second encapsulant is deposited over the electrical component. The second encapsulant has a low dielectric constant less than the high dielectric constant of the first encapsulant. A shielding layer is disposed over the second encapsulant.
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公开(公告)号:US11887863B2
公开(公告)日:2024-01-30
申请号:US17447029
申请日:2021-09-07
Applicant: STATS ChipPAC Pte. Ltd.
Inventor: HunTeak Lee , Gwang Kim , Junho Ye
IPC: H01L21/48 , H01L21/56 , H01L23/60 , H01L23/00 , H01L25/065 , H01L25/00 , H01L23/498 , H01L23/31
CPC classification number: H01L21/4853 , H01L21/561 , H01L21/565 , H01L23/3121 , H01L23/49811 , H01L23/60 , H01L24/81 , H01L24/97 , H01L25/0652 , H01L25/50 , H01L2224/81815 , H01L2924/1532
Abstract: A semiconductor device has a substrate and a first component disposed over a first surface of the substrate. A connector is disposed over the first surface of the substrate. A first encapsulant is deposited over the first component while the connector remains outside of the first encapsulant. A shielding layer is formed over the first encapsulant while the connector remains outside of the shielding layer. A second component is disposed over a second surface of the substrate. A solder bump is disposed over the second surface of the substrate. A second encapsulant is deposited over the second surface of the substrate. An opening is formed through the second encapsulant to expose the solder bump. A solder ball is disposed in the opening. The solder ball and solder bump are reflowed to form a combined solder bump.
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