公开(公告)号：US20140327107A1

公开(公告)日：2014-11-06

申请号：US14332631

申请日：2014-07-16

Applicant: STATS ChipPAC, Ltd.

Inventor： Meenakshi Padmanathan ,  Seung Wook Yoon ,  YongTaek Lee

IPC: H01L49/02

CPC classification number: H01L28/10 ,  H01L23/5226 ,  H01L23/5227 ,  H01L23/528 ,  H01L23/5329 ,  H01L23/66 ,  H01L2224/0554 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/19015 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

Abstract: A semiconductor device has a trench formed in a substrate. The trench has tapered sidewalls and depth of 10-120 micrometers. A first insulating layer is conformally applied over the substrate and into the trench. An insulating material, such as polymer, is deposited over the first insulating layer in the trench. A first conductive layer is formed over the insulating material. A second insulating layer is formed over the first insulating layer and first conductive layer. A second conductive layer is formed over the second insulating layer and electrically contacts the first conductive layer. The first and second conductive layers are isolated from the substrate by the insulating material in the trench. A third insulating layer is formed over the second insulating layer and second conductive layer. The first and second conductive layers are coiled over the substrate to exhibit inductive properties.

Abstract translation: 半导体器件具有形成在衬底中的沟槽。 沟槽具有锥形侧壁，深度为10-120微米。 第一绝缘层保形地施加在衬底上并进入沟槽。 诸如聚合物的绝缘材料沉积在沟槽中的第一绝缘层上。 绝缘材料上形成第一导电层。 在第一绝缘层和第一导电层上形成第二绝缘层。 第二导电层形成在第二绝缘层上并与第一导电层电接触。 第一和第二导电层通过沟槽中的绝缘材料与衬底隔离。 在第二绝缘层和第二导电层上形成第三绝缘层。 第一和第二导电层被卷绕在衬底上以呈现感应性质。

公开(公告)号：US09640603B2

公开(公告)日：2017-05-02

申请号：US14332631

申请日：2014-07-16

Applicant: STATS ChipPAC, Ltd.

Inventor： Meenakshi Padmanathan ,  Seung Wook Yoon ,  YongTaek Lee

IPC: H01L49/02 ,  H01L23/522 ,  H01L23/66

CPC classification number: H01L28/10 ,  H01L23/5226 ,  H01L23/5227 ,  H01L23/528 ,  H01L23/5329 ,  H01L23/66 ,  H01L2224/0554 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/19015 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

Abstract: A semiconductor device has a trench formed in a substrate. The trench has tapered sidewalls and depth of 10-120 micrometers. A first insulating layer is conformally applied over the substrate and into the trench. An insulating material, such as polymer, is deposited over the first insulating layer in the trench. A first conductive layer is formed over the insulating material. A second insulating layer is formed over the first insulating layer and first conductive layer. A second conductive layer is formed over the second insulating layer and electrically contacts the first conductive layer. The first and second conductive layers are isolated from the substrate by the insulating material in the trench. A third insulating layer is formed over the second insulating layer and second conductive layer. The first and second conductive layers are coiled over the substrate to exhibit inductive properties.