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    MULTIPLY-ACCUMULATE OPERATION DEVICE
    1.
    发明申请
    MULTIPLY-ACCUMULATE OPERATION DEVICE 有权

    公开(公告)号：US20210081176A1

    公开(公告)日：2021-03-18

    申请号：US17039002

    申请日：2020-09-30

    Applicant: Sony Corporation

    Inventor： Takashi Morie ,  Quan Wang ,  Hakaru Tamukoh

    IPC: G06F7/544 ,  G06N3/04 ,  G06N3/063

    Abstract: Electric charges depending on values of N+ electric signals and values of corresponding positive loads are held in first capture-and-storage circuitry. Electric charges having a size depending on values of (N−N+) electric signals and corresponding absolute values of negative loads are held in second capture-and-storage circuitry. A sum of N+ multiplied values obtained by multiplying each of the positive loads by each of the values of the N+ electric signals is calculated when a voltage held in the first capture-and-storage circuitry reaches a first threshold. A sum of (N−N+) multiplied values obtained by multiplying each of the absolute values by each of the values of the (N−N+) electric signals is calculated when a voltage held in the second capture-and-storage circuitry reaches a second threshold A sum of N multiplied values is obtained by subtracting the sum of (N−N+) multiplied values from the sum of N+ multiplied values.

    ARITHMETIC LOGIC UNIT, MULTIPLY-ACCUMULATE OPERATION DEVICE, MULTIPLY-ACCUMULATE OPERATION SYSTEM, AND MULTIPLY-ACCUMULATE OPERATION METHOD
    8.
    发明申请
    ARITHMETIC LOGIC UNIT, MULTIPLY-ACCUMULATE OPERATION DEVICE, MULTIPLY-ACCUMULATE OPERATION SYSTEM, AND MULTIPLY-ACCUMULATE OPERATION METHOD 有权

    公开(公告)号：US20210318853A1

    公开(公告)日：2021-10-14

    申请号：US17258965

    申请日：2019-07-12

    Applicant: Sony Corporation

    Inventor： Takashi Morie ,  Ha karu Tamukoh ,  Quan Wang ,  Yasushi Fujinami

    IPC: G06F7/544

    Abstract: An arithmetic logic unit according to an embodiment of the present technology includes: a plurality of input lines; and a multiply-accumulate operation device. Pulse signals corresponding to input values are input to the plurality of input lines. The multiply-accumulate operation device includes a plurality of multiplication units that generates, on the basis of the pulse signals input to each of the plurality of input lines, charges corresponding to multiplication values obtained by multiplying the input values by weight values, and an output unit that outputs a multiply-accumulate signal representing a sum of the multiplication values by accumulating the charges corresponding to the multiplication values generated by each of the plurality of multiplication units. A value of at least one of the input value or the weight value is limited.

    Multiply-accumulate operation device
    9.
    发明授权
    Multiply-accumulate operation device 有权

    公开(公告)号：US10831447B2

    公开(公告)日：2020-11-10

    申请号：US16325003

    申请日：2017-08-03

    Applicant: Sony Corporation

    Inventor： Takashi Morie ,  Quan Wang ,  Hakaru Tamukoh

    IPC: G06F7/544 ,  G06N3/063 ,  G06N3/04

    Abstract: Electric charges depending on values of N+ electric signals and values of corresponding positive loads are held in first capture-and-storage circuitry. Electric charges having a size depending on values of (N−N+) electric signals and corresponding absolute values of negative loads are held in second capture-and-storage circuitry. A sum of N+ multiplied values obtained by multiplying each of the positive loads by each of the values of the N+ electric signals is calculated when a voltage held in the first capture-and-storage circuitry reaches a first threshold. A sum of (N−N+) multiplied values obtained by multiplying each of the absolute values by each of the values of the (N−N+) electric signals is calculated when a voltage held in the second capture-and-storage circuitry reaches a second threshold A sum of N multiplied values is obtained by subtracting the sum of (N−N+) multiplied values from the sum of N+ multiplied values.

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