公开(公告)号：US20240237216A9

公开(公告)日：2024-07-11

申请号：US18491456

申请日：2023-10-20

申请人： SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

发明人： Oseob JEON ,  Seungwon IM ,  Rajani Kumar THIRUKOLURI ,  Roveendra PAUL

IPC分类号： H05K1/18 ,  H05K1/11

CPC分类号： H05K1/18 ,  H05K1/11 ,  H05K2201/10166

摘要： In a general aspect, a half-bridge circuit includes a substrate having first, second and third patterned metal layers disposed on a surface. The circuit also includes first and second high-side transistors disposed on the first patterned metal layer, and first and conductive clips electrically coupling, respectively, the first and second high-side transistors with the second patterned metal layer. The circuit also includes first and second low-side transistors disposed on the second patterned metal layer, and third and fourth conductive clips electrically coupling, respectively, the first and second low-side transistors with the third patterned metal layer. The circuit further includes a DC+ terminal electrically coupled with the first patterned metal layer via a first conductive post disposed between the first and second high-side transistors, and a DC− terminal electrically coupled with the third patterned metal layer via a second conductive post disposed between the third and fourth conductive clips.

公开(公告)号：US20240055334A1

公开(公告)日：2024-02-15

申请号：US18354863

申请日：2023-07-19

申请人： SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

发明人： Seungwon IM ,  Oseob JEON ,  Jihwan KIM ,  Dongwook KANG

IPC分类号： H01L23/498 ,  H01L23/31 ,  H01L21/48 ,  H01L21/56

CPC分类号： H01L23/49811 ,  H01L23/3121 ,  H01L21/4853 ,  H01L21/56

摘要： In a general aspect, an electronic device assembly includes a circuit including at least one semiconductor die, and a signal lead electrically coupled with the circuit. The signal lead has a hole defined therethrough. The assembly further includes an electrically conductive signal pin holder disposed in the hole of the signal lead. The electrically conductive signal pin holder is electrically coupled with the signal lead. The assembly also includes a molding compound encapsulating, at least, the circuit; a portion of the signal lead including the hole; and a portion of the electrically conductive signal pin holder. An open end of the electrically conductive signal pin holder is accessible outside the molding compound.

公开(公告)号：US20230019930A1

公开(公告)日：2023-01-19

申请号：US17806961

申请日：2022-06-15

申请人： SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

发明人： Inpil YOO ,  Jerome TEYSSEYRE ,  Oseob JEON ,  Keunhyuk LEE ,  Michael J. SEDDON

IPC分类号： H01L23/44 ,  H05K7/20

摘要： Implementations of a semiconductor package may include one or more power semiconductor die included in a die module; a first heat sink directly coupled to one or more source pads of the die module; a second heat sink directly coupled to one or more drain pads of the die module; a gate contact coupled with one or more gate pads of the die module; and a coating coupled directly to the die module. The gate contact may be configured to extend through an immersion cooling enclosure.

公开(公告)号：US20210265318A1

公开(公告)日：2021-08-26

申请号：US17316367

申请日：2021-05-10

申请人： SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

发明人： Seungwon IM ,  Oseob JEON ,  JoonSeo SON ,  Mankyo JONG ,  Olaf ZSCHIESCHANG

IPC分类号： H01L25/065 ,  H01L23/538 ,  H01L25/07 ,  H01L21/56 ,  H01L23/373 ,  H01L23/00

摘要： Implementations of semiconductor packages may include: a first substrate having a first dielectric layer coupled between a first metal layer and a second metal layer; a second substrate having a second dielectric layer coupled between a third metal layer and a fourth metal layer. A first die may be coupled with a first electrical spacer coupled in a space between and coupled with the first substrate and the second substrate and a second die may be coupled with a second electrical spacer coupled in a space between and coupled with the first substrate and the second substrate.

公开(公告)号：US20210143107A1

公开(公告)日：2021-05-13

申请号：US16680795

申请日：2019-11-12

申请人： SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

发明人： Seungwon IM ,  Oseob JEON

IPC分类号： H01L23/00 ,  H01L23/495 ,  H01L21/48

摘要： In general aspect, a semiconductor device package can include a substrate and a semiconductor die disposed on and coupled with the substrate. The semiconductor device package can further include a leadframe having an indentation defined therein, at least a portion of the indentation being disposed on and coupled with the semiconductor die via a conductive adhesive.

公开(公告)号：US20200185305A1

公开(公告)日：2020-06-11

申请号：US16790933

申请日：2020-02-14

申请人： SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

发明人： Seungwon IM ,  Oseob JEON ,  Byoungok LEE ,  Yoonsoo LEE ,  Joonseo SON ,  Dukyong LEE ,  Changyoung PARK

IPC分类号： H01L23/433 ,  H01L25/065 ,  H01L23/498 ,  H01L23/13 ,  H01L23/495 ,  H01L23/473

摘要： Implementations of semiconductor packages may include a first substrate coupled to a first die, a second substrate coupled to a second die, and a spacer included within a perimeter of the first substrate and within a perimeter of a second substrate, the spacer coupled between the first die and the second die, the spacer include a junction cooling pipe therethrough.

公开(公告)号：US20240282663A1

公开(公告)日：2024-08-22

申请号：US18635186

申请日：2024-04-15

申请人： SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

发明人： Seungwon IM ,  Dongwook KANG ,  Oseob JEON

IPC分类号： H01L23/373 ,  H01L23/31 ,  H01L23/367 ,  H01L23/473 ,  H01L25/07

CPC分类号： H01L23/3735 ,  H01L23/3107 ,  H01L23/3672 ,  H01L23/473 ,  H01L25/072

摘要： In a general aspect, an electronic device assembly can include a semiconductor device assembly including a ceramic substrate; a patterned metal layer disposed on a first surface of the ceramic substrate; and a semiconductor die disposed on the patterned metal layer. The electronic device assembly can also include a thermal dissipation appliance. Ceramic material of a second surface of the ceramic substrate can be direct-bonded to a surface of the thermal dissipation appliance. The second surface of the ceramic substrate can be opposite the first surface of the ceramic substrate.

公开(公告)号：US20240162110A1

公开(公告)日：2024-05-16

申请号：US18054229

申请日：2022-11-10

申请人： SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

发明人： Seungwon IM ,  Jeungdae KIM ,  Oseob JEON ,  Byoungok LEE

IPC分类号： H01L23/373 ,  H01L21/56 ,  H01L23/31 ,  H01L23/42 ,  H01L23/495

CPC分类号： H01L23/3735 ,  H01L21/56 ,  H01L23/3107 ,  H01L23/42 ,  H01L23/49503 ,  H01L24/32 ,  H01L2224/32245

摘要： In a general aspect, a semiconductor device package can include a die attach paddle having a first surface and a second surface that is opposite the first surface; a semiconductor die coupled with the first surface of the die attach paddle, and a direct-bonded-metal (DBM) substrate The DBM substrate can include a ceramic layer having a first surface and a second surface that is opposite the first surface, a first metal layer disposed on the first surface of the ceramic layer and coupled with the second surface of the die attach paddle, a second metal layer disposed on the second surface of the ceramic layer, and a thermally conductive adhesive disposed on the second metal layer, At least a surface of the thermally conductive adhesive can be exposed external to the device package. The thermally conductive adhesive can be configured for coupling the device package with a thermal dissipation appliance.

公开(公告)号：US20240120253A1

公开(公告)日：2024-04-11

申请号：US18182552

申请日：2023-03-13

申请人： SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

发明人： Oseob JEON ,  Dongwook KANG ,  Seungwon IM ,  Jihwan KIM

IPC分类号： H01L23/373 ,  H01L21/48 ,  H01L21/56 ,  H01L23/31 ,  H01L23/367 ,  H01L23/495

CPC分类号： H01L23/373 ,  H01L21/4846 ,  H01L21/56 ,  H01L23/3107 ,  H01L23/3672 ,  H01L23/49568 ,  H01L24/32 ,  H01L2224/32245

摘要： An integrated substrate may include a conductor layer; a heat sink including a plurality of fins extending therefrom; and a dielectric layer including boron nitride chemically bonded to the conductor layer and to the heat sink with an epoxy.

公开(公告)号：US20230361011A1

公开(公告)日：2023-11-09

申请号：US18308467

申请日：2023-04-27

申请人： SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

发明人： Seungwon IM ,  Oseob JEON

IPC分类号： H01L23/498 ,  H01L23/31 ,  H01L23/433

CPC分类号： H01L23/49811 ,  H01L23/3121 ,  H01L23/4334

摘要： In a general aspect, an electronic device assembly includes a substrate having a surface, a patterned metal layer disposed on the surface of the substrate, a semiconductor device circuit implemented on the patterned metal layer, and a molded body including a plurality of signal pin. A signal pin of the plurality of signal pins includes a first portion extending out of a first surface of the molded body. The first portion is externally accessible. The signal pin of the plurality of signal pins also includes a second portion extending out of a second surface of the molded body opposite the first surface. The second portion of the signal pin of the plurality of signal pins include is internal to the electronic device assembly, is electrically coupled with the patterned metal layer, and is electrically continuous with the first portion.