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公开(公告)号:US11430779B2
公开(公告)日:2022-08-30
申请号:US17028855
申请日:2020-09-22
发明人: Jaewan Yang , Wootae Kim , Hyungock Kim , Sangdo Park , Jun Seomun
IPC分类号: H01L27/02 , H01L21/768 , H01L27/088 , H01L23/522
摘要: Disclosed are a semiconductor device and a method of fabricating the same. The method includes placing a standard cell, resizing a power via pattern in such a way that the power via pattern has a different width from a width of other via pattern, and applying different design rules to the power via pattern and the other via pattern, respectively, to perform a routing operation on the standard cell.
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2.
公开(公告)号:US10599130B2
公开(公告)日:2020-03-24
申请号:US15867939
申请日:2018-01-11
发明人: Wootae Kim , Hyung-Ock Kim , Jaehoon Kim , Naya Ha , Ki-Ok Kim , Eunbyeol Kim , Jung Yun Choi , Sun Ik Heo
IPC分类号: G06F17/50 , G05B19/4097
摘要: A method of manufacturing an integrated circuit (IC) including instances of standard cells includes arranging a first instance and arranging a second instance adjacent to the first instance. The second instance has a front-end layer pattern corresponding to a context group of the first instance. The context group includes information about front-end layer patterns of instances, the front-end layer patterns causing a same local layout effect (LLE) on the first instance and arranged adjacent to the first instance.
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