公开(公告)号：US20220271091A1

公开(公告)日：2022-08-25

申请号：US17540298

申请日：2021-12-02

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Song Yi KIM ,  Junghyun CHO

IPC: H01L27/24

Abstract: A variable resistance memory device includes a memory cell structure on a substrate, the memory cell structure including conductive layers, each of the conductive layers including conductive lines spaced apart from each other in a direction parallel to a top surface of the substrate, and memory cell arrays alternatingly stacked with the conductive layers in a first direction perpendicular to a top surface of the substrate, a first peripheral circuit layer between the substrate and the memory cell structure, the first peripheral circuit layer including first transistors, and a second peripheral circuit layer between the first peripheral circuit layer and the memory cell structure, the second peripheral circuit layer including second transistors, and the second transistors including core transistors that are connected to corresponding ones of the conductive lines.

公开(公告)号：US20240306400A1

公开(公告)日：2024-09-12

申请号：US18665005

申请日：2024-05-15

Applicant: Samsung Electronics Co., Ltd.

Inventor： Song Yi KIM

IPC: H10B63/00 ,  H01L29/06 ,  H01L29/423 ,  H01L29/78 ,  H01L29/786

CPC classification number: H10B63/30 ,  H01L29/0665 ,  H01L29/42392 ,  H01L29/7851 ,  H01L29/78696

Abstract: A semiconductor memory device includes: first conductive lines provided on a substrate and extending in a first direction in parallel, each of the first conductive lines including a first end portion and a second end portion that are opposite to each other, the first direction being parallel to a top surface of the substrate; first selection transistors respectively connected to the first end portions of the first conductive lines; and second selection transistors respectively connected to the second end portions of the first conductive lines. Each of the first selection transistors may have a first gate width. Each of the second selection transistors may have a second gate width smaller than the first gate width.

公开(公告)号：US20210391385A1

公开(公告)日：2021-12-16

申请号：US17329700

申请日：2021-05-25

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Song Yi KIM

IPC: H01L27/24 ,  H01L29/78 ,  H01L29/06 ,  H01L29/423 ,  H01L29/786

Abstract: A semiconductor memory device includes: first conductive lines provided on a substrate and extending in a first direction in parallel, each of the first conductive lines including a first end portion and a second end portion that are opposite to each other, the first direction being parallel to a top surface of the substrate; first selection transistors respectively connected to the first end portions of the first conductive lines; and second selection transistors respectively connected to the second end portions of the first conductive lines. Each of the first selection transistors may have a first gate width. Each of the second selection transistors may have a second gate width smaller than the first gate width.