公开(公告)号：US20230268241A1

公开(公告)日：2023-08-24

申请号：US18140907

申请日：2023-04-28

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jaehoon CHOI ,  Sayoon Kang ,  Taewook Kim ,  Hwasub Oh ,  Jooyung Chol

IPC: H01L23/34 ,  H01L23/495 ,  H01L23/00 ,  H01L23/28 ,  H01L23/538 ,  H01L25/065

CPC classification number: H01L23/34 ,  H01L23/4952 ,  H01L23/49541 ,  H01L23/49568 ,  H01L24/14 ,  H01L23/28 ,  H01L23/5384 ,  H01L25/0657 ,  H01L23/49575

Abstract: A semiconductor package includes a connection structure having first and second surfaces opposing each other and including a first redistribution layer; a semiconductor chip disposed on the first surface of the connection structure and including connection pads connected to the first redistribution layer; an encapsulant disposed on the first surface of the connection structure and encapsulating the semiconductor chip; and a second redistribution layer disposed on the encapsulant; a wiring structure connecting the first and second redistribution layers to each other and extending in a stacking direction; and a heat dissipation element disposed on at least a portion of the second surface of the connection structure.

公开(公告)号：US20200273771A1

公开(公告)日：2020-08-27

申请号：US16720131

申请日：2019-12-19

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jaehoon Choi ,  Sayoon Kang ,  Taewook Kim ,  Hwasub Oh ,  Jooyoung Choi

IPC: H01L23/34 ,  H01L23/495 ,  H01L23/28 ,  H01L23/538 ,  H01L25/065 ,  H01L23/00

Abstract: A semiconductor package includes a connection structure having first and second surfaces opposing each other and including a first redistribution layer; a semiconductor chip disposed on the first surface of the connection structure and including connection pads connected to the first redistribution layer; an encapsulant disposed on the first surface of the connection structure and encapsulating the semiconductor chip; and a second redistribution layer disposed on the encapsulant; a wiring structure connecting the first and second redistribution layers to each other and extending in a stacking direction; and a heat dissipation element disposed on at least a portion of the second surface of the connection structure.

公开(公告)号：US11646241B2

公开(公告)日：2023-05-09

申请号：US16720131

申请日：2019-12-19

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jaehoon Choi ,  Sayoon Kang ,  Taewook Kim ,  Hwasub Oh ,  Jooyoung Choi

IPC: H01L23/34 ,  H01L23/495 ,  H01L23/00 ,  H01L23/28 ,  H01L23/538 ,  H01L25/065

CPC classification number: H01L23/34 ,  H01L23/28 ,  H01L23/4952 ,  H01L23/49541 ,  H01L23/49568 ,  H01L23/49575 ,  H01L23/5384 ,  H01L24/14 ,  H01L25/0657

Abstract: A semiconductor package includes a connection structure having first and second surfaces opposing each other and including a first redistribution layer; a semiconductor chip disposed on the first surface of the connection structure and including connection pads connected to the first redistribution layer; an encapsulant disposed on the first surface of the connection structure and encapsulating the semiconductor chip; and a second redistribution layer disposed on the encapsulant; a wiring structure connecting the first and second redistribution layers to each other and extending in a stacking direction; and a heat dissipation element disposed on at least a portion of the second surface of the connection structure.

公开(公告)号：US11205631B2

公开(公告)日：2021-12-21

申请号：US16822300

申请日：2020-03-18

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Yonghoon Kim ,  Jaehyun Lim ,  Yuntae Lee ,  Sayoon Kang

IPC: H01L23/00 ,  H01L23/31 ,  H01L23/48 ,  H01L25/065

Abstract: Provided is a semiconductor package including a package structure including a base connection member including a redistribution layer, a first semiconductor chip including a plurality of first connection pads connected to the redistribution layer, an encapsulant disposed on the base connection member and covering at least a portion of the first semiconductor chip, and a backside connection member disposed on the encapsulant and including a backside wiring layer electrically connected to the redistribution layer, and a second semiconductor chip disposed on the base connection member or the backside connection member, the second semiconductor chip including a plurality of second connection pads connected to the redistribution layer or the backside wiring layer, the second semiconductor chip including a logic circuit, the first semiconductor chip including a logic input and output terminals that are connected to the logic circuit through at least one of the redistribution layer and the backside wiring layer.