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公开(公告)号:US09928610B2
公开(公告)日:2018-03-27
申请号:US14743700
申请日:2015-06-18
Applicant: Samsung Electronics Co., Ltd.
Inventor: Abhinav Golas , Karthik Ramani , Christopher T. Cheng , John W. Brothers , Liangjun Zhang , Santosh Abraham , Ki Fung Chow
IPC: G06T7/20 , G06T5/00 , G06T11/00 , G06T1/60 , G06K9/62 , G09G5/36 , G06T7/33 , G06T7/30 , G06T7/32 , G06T15/00
CPC classification number: G06T7/337 , G06K9/6202 , G06T1/60 , G06T5/001 , G06T7/30 , G06T7/32 , G06T11/001 , G06T15/005 , G06T2200/12 , G06T2207/10016 , G06T2207/10028 , G06T2207/20192 , G09G5/363
Abstract: An apparatus, system and method is provided to determine a motion of pixels in local regions of a scene, classify the motion into a speed category, and make decisions on how to render blocks of pixels. In one implementation the motion in a tile is classified into at least three different speed regimes. If the pixels in a tile are in a quasi-static speed regime, a determination is made whether or not to reuse a fraction of pixels from the previous frame. If the pixels are determined to be in a high speed regime, a decision is made whether or not a sampling rate may be reduced.
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公开(公告)号:US10181176B2
公开(公告)日:2019-01-15
申请号:US15420463
申请日:2017-01-31
Applicant: Samsung Electronics Co., Ltd.
Inventor: Santosh Abraham , Karthik Ramani , Woong Seo , Kwontaek Kwon , Jeongae Park
IPC: G06T1/60 , H04N19/426 , H04N19/44 , G06T15/04 , G06T15/00
Abstract: A texture cache architecture includes a first texture cache to store compressed texel data and a second texture cache to store decompressed texel data. A controller schedules accesses to access texel data from the first or second texture cache. The second texture cache permits decompressed texel data to be reused for more than one texel access request.
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公开(公告)号:US09754344B2
公开(公告)日:2017-09-05
申请号:US14645210
申请日:2015-03-11
Applicant: Samsung Electronics Co., Ltd.
Inventor: John W. Brothers , Santosh Abraham
IPC: G06T11/00 , H04N19/00 , H04N19/176 , G06F9/45 , G06F9/38 , G06T1/60 , G09G5/36 , G09G5/393 , G06T11/40
CPC classification number: G06T1/60 , G06F8/433 , G06F9/3838 , G06T11/40 , G09G5/363 , G09G5/393 , G09G2350/00 , G09G2360/121
Abstract: A graphics processing operation may include a set of render target operations, in which render targets are read and one or more intermediate computations are performed before generating final render target output. A method of performing graphics processing includes determining a dependency between render targets and defining a scheduling of tiles to reduce or eliminate a need to write intermediate computations to external memory. An interleaved order may be determined to maintain intermediate computations of dependent render target operations in an on-chip cache hierarchy.
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公开(公告)号:US20210374900A1
公开(公告)日:2021-12-02
申请号:US16988526
申请日:2020-08-07
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Sushant Kondguli , Santosh Abraham
Abstract: A method includes determining that a new draw call is received; comparing a state identity (ID) of a graphics state stored in the ring storage with a state ID of a graphics state associated with the new draw call; determining if the ring storage has available space to store the graphics state associated with the new draw call; storing the graphics state associated with the new draw call in the ring storage, based on determining that the ring storage has available space; determining a location of a first valid and non-default entry and a last valid and non-default entry of the graphics state associated with the new draw call stored in the ring storage; and collecting data from one or more valid entries of the graphics state associated with the new draw call stored in the ring storage to complete a task associated with the new draw call.
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公开(公告)号:US20180197304A1
公开(公告)日:2018-07-12
申请号:US15913776
申请日:2018-03-06
Applicant: Samsung Electronics Co., Ltd.
Inventor: Abhinav Golas , Karthik Ramani , Christopher T. Cheng , John W. Brothers , Liangjun Zhang , Santosh Abraham , Ki Fung Chow
IPC: G06T7/33 , G06T15/00 , G06T7/30 , G06K9/62 , G06T1/60 , G06T5/00 , G06T7/32 , G06T11/00 , G09G5/36
CPC classification number: G06T7/337 , G06K9/6202 , G06T1/60 , G06T5/001 , G06T7/30 , G06T7/32 , G06T11/001 , G06T15/005 , G06T2200/12 , G06T2207/10016 , G06T2207/10028 , G06T2207/20192 , G09G5/363
Abstract: An apparatus, system and method is provided to determine a motion of pixels in local regions of a scene, classify the motion into a speed category, and make decisions on how to render blocks of pixels. In one implementation the motion in a tile is classified into at least three different speed regimes. If the pixels in a tile are in a quasi-static speed regime, a determination is made whether or not to reuse a fraction of pixels from the previous frame. If the pixels are determined to be in a high speed regime, a decision is made whether or not a sampling rate may be reduced.
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公开(公告)号:US11416961B2
公开(公告)日:2022-08-16
申请号:US16988526
申请日:2020-08-07
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Sushant Kondguli , Santosh Abraham
Abstract: A method includes determining that a new draw call is received; comparing a state identity (ID) of a graphics state stored in the ring storage with a state ID of a graphics state associated with the new draw call; determining if the ring storage has available space to store the graphics state associated with the new draw call; storing the graphics state associated with the new draw call in the ring storage, based on determining that the ring storage has available space; determining a location of a first valid and non-default entry and a last valid and non-default entry of the graphics state associated with the new draw call stored in the ring storage; and collecting data from one or more valid entries of the graphics state associated with the new draw call stored in the ring storage to complete a task associated with the new draw call.
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公开(公告)号:US10055810B2
公开(公告)日:2018-08-21
申请号:US15420459
申请日:2017-01-31
Applicant: Samsung Electronics Co., Ltd.
Inventor: Santosh Abraham , Karthik Ramani , Woong Seo , Kwontaek Kwon , Jeongae Park
CPC classification number: G06T1/60 , G06T15/005 , G06T15/04 , H04N19/426 , H04N19/44 , Y02D10/13
Abstract: A texture cache architecture facilitates access of compressed texture data in non-power of two formats, such as the Adaptive Scalable Texture Compression (ASTC) codec. In one implementation, the texture cache architecture includes a controller, a first buffer, a second buffer, and a texture decompressor. A first buffer stores one or more blocks of compressed texel data fetched, in response to a first request, from a first texture cache, where the one or more blocks of compressed texel data including at least requested texel data. The second buffer stores decompressed one or more blocks of compressed texel data and provides the decompressed requested texel data as output to a second texture cache. The one or more blocks of compressed texel data stored by the first buffer includes second texel data in addition to the requested texel data.
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公开(公告)号:US09904971B2
公开(公告)日:2018-02-27
申请号:US14742322
申请日:2015-06-17
Applicant: Samsung Electronics Co., Ltd.
Inventor: Christopher T. Cheng , Liangjun Zhang , Santosh Abraham , Ki Fung Chow
CPC classification number: G06T1/20 , G06T15/005 , G06T2210/08 , G06T2210/36
Abstract: In a graphics system regions of a frame are analyzed to determine local regions of the frame in which adaptive desampling may be performed. In one implementation a standard sampling scheme includes at least one sample per pixel and regions that are adaptively desampled have one sample for a block of pixels having a size of at least four pixels. A level of detail map is generating to identify regions in which desampling may be performed. The level of detail map may be based on detecting motion, detecting an edge, and detecting a content frequency.
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公开(公告)号:US09652817B2
公开(公告)日:2017-05-16
申请号:US14656074
申请日:2015-03-12
Applicant: Samsung Electronics Co., Ltd.
Inventor: John W. Brothers , Santosh Abraham , Joohoon Lee , Abhinav Golas , Seonggun Kim
CPC classification number: G06T1/20 , G06T1/60 , H04N5/232 , H04N5/2355 , H04N9/045
Abstract: In a pipelined application having different stages of processing, such as a graphics application or an image processing application, there may be a dependence of one compute kernel upon another. Data associated with individual kernels needs to be written and read. A technique to minimize a need to read and write kernel data to external memory utilize at least one of fusing kernels, resizing workgroups, and performing interleaving of kernels.
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