Abstract:
A bootstrap circuit including: a charge pump; a power unit including a bootstrap capacitor, wherein the bootstrap capacitor is charged using an output voltage of the charge pump; and a switch driver for generating a bootstrap signal based on a clock signal and an analog signal, wherein the analog signal is input to an analog switch, the switch driver for controlling the analog switch using the bootstrap signal, and including a first body switch connected between an input terminal and a body of the analog switch.
Abstract:
An image processing device includes a switch signal generator, an amplifier, a ramp generator, and an attenuation control circuit. The switch signal generator generates switch control signals based on a level of an image signal that corresponds to a pixel signal output from a pixel. The amplifier includes a first input terminal and a second input terminal. The ramp generator generates a ramp signal. The attenuation control circuit adjusts an arrangement of capacitors according to the switch control signals to control whether to attenuate each of the pixel signal and the ramp signal, and transmits signals generated as a result of the adjusted arrangement to the first input terminal and the second input terminal.
Abstract:
A semiconductor memory device comprises a substrate; a mold structure on the substrate; a plurality of channel structures extending in the mold structure; a source layer and a source sacrificial layer between the substrate and the mold structure, wherein the source sacrificial layer is spaced apart from the source layer; and a source support layer on the source layer and the source sacrificial layer, wherein the source support layer is between the source layer and the source sacrificial layer, wherein an upper surface of the source support layer includes first and second portions extending parallel to the substrate, and a third portion that connects the first and second portions, wherein a vertical distance from an upper surface of the source layer to the first portion is smaller than a vertical distance from an upper surface of the substrate to the second portion.
Abstract:
A non-volatile memory device including: a first string including a first string select transistor, a first memory cell and a first ground select transistor, a second string including a second string select transistor, a second memory cell and a second ground select transistor, and a controller to apply a pass voltage to a first string select line from a first time, apply a first read voltage to a first word line during a first read section from the first time to a second time, apply a first ground select line voltage to a first ground select line from the first time, apply a ground voltage to a second string select line, apply the first ground select line voltage to a second ground select line during a first control section, and apply a first common source line voltage to a common source line during the first control section.