公开(公告)号：US10804198B2

公开(公告)日：2020-10-13

申请号：US16839206

申请日：2020-04-03

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yunjung Choi ,  Kivin Im ,  Dongbok Lee ,  Inseak Hwang

IPC: H01L23/528 ,  H01L27/108 ,  H01L27/115

Abstract: Semiconductor devices are provided including a plurality of nonlinear bit lines formed on a substrate including a plurality of active areas; a plurality of word lines that pass through the plurality of active areas; an integral spacer that covers two sidewalls of the plurality of nonlinear bit lines and defines a plurality of spaces that expose two adjacent ones of the plurality of active areas; two conductive patterns that respectively abut on the two adjacent active areas in one of the plurality of spaces that is selected; and a contact separating insulation layer that is formed between the two conductive patterns in the one selected space.

公开(公告)号：US10777560B2

公开(公告)日：2020-09-15

申请号：US16833914

申请日：2020-03-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jonghyuk Park ,  Byoungho Kwon ,  Inho Kim ,  Hyesung Park ,  Jin-Woo Bae ,  Yanghee Lee ,  Inseak Hwang

IPC: H01L27/108 ,  H01L21/66

Abstract: Provided are a semiconductor device and a method of fabricating the same. The semiconductor device may include a semiconductor substrate including a first region and a second region, a dummy separation pattern provided on the second region of the semiconductor substrate to have a recessed region at its upper portion, a first electrode provided on the first region of the semiconductor substrate, a dielectric layer covering the first electrode, a second electrode provided on the dielectric layer, and a remaining electrode pattern provided in the recessed region. The second electrode and the remaining electrode pattern may be formed of a same material.

公开(公告)号：US10748906B2

公开(公告)日：2020-08-18

申请号：US16110658

申请日：2018-08-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jonghyuk Park ,  Byoungho Kwon ,  Inho Kim ,  Hyesung Park ,  Jin-Woo Bae ,  Yanghee Lee ,  Inseak Hwang

IPC: H01L27/108 ,  H01L21/66

Abstract: Provided are a semiconductor device and a method of fabricating the same. The semiconductor device may include a semiconductor substrate including a first region and a second region, a dummy separation pattern provided on the second region of the semiconductor substrate to have a recessed region at its upper portion, a first electrode provided on the first region of the semiconductor substrate, a dielectric layer covering the first electrode, a second electrode provided on the dielectric layer, and a remaining electrode pattern provided in the recessed region. The second electrode and the remaining electrode pattern may be formed of a same material.

公开(公告)号：US09564343B2

公开(公告)日：2017-02-07

申请号：US14990353

申请日：2016-01-07

Applicant: Samsung Electronics Co., Ltd.

Inventor： Mongsup Lee ,  Yoonho Son ,  Sang-Jun Lee ,  Munkwon Kang ,  Kyunghyun Kim ,  Inseak Hwang

IPC: H01L21/302 ,  H01L21/461 ,  H01L21/311

CPC classification number: H01L21/31116 ,  H01L21/02063 ,  H01L21/7682 ,  H01L27/10814 ,  H01L27/10823 ,  H01L27/10852 ,  H01L27/10876 ,  H01L27/10885 ,  H01L27/10888

Abstract: A substrate having an insulating layer including an oxide is loaded into a chamber, and at least a part of the insulating layer is removed by injecting a process gas including an etching source gas into the chamber. The removal process is performed in a pulse type in which a first period and a second period are repeated a plurality of times. The etching source gas is supplied at a first flow rate during the first period and is supplied at a second flow rate less than the first flow rate during the second period. A temperature of the inside of the chamber remains at 100° C. or more during the removal process.

Abstract translation: 具有包含氧化物的绝缘层的衬底被加载到腔室中，并且通过将包括蚀刻源气体的处理气体注入到室中来去除绝缘层的至少一部分。 去除处理以多次重复第一周期和第二周期的脉冲类型执行。 蚀刻源气体在第一时段期间以第一流量供应，并且在第二时段期间以小于第一流量的第二流量供应。 在除去过程中，室内温度保持在100℃或更高。

公开(公告)号：US10756092B2

公开(公告)日：2020-08-25

申请号：US16814387

申请日：2020-03-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jonghyuk Park ,  Byoungho Kwon ,  Inho Kim ,  Hyesung Park ,  Jin-Woo Bae ,  Yanghee Lee ,  Inseak Hwang

IPC: H01L27/108 ,  H01L21/66

Abstract: A method of fabricating a semiconductor device includes providing a substrate including a pair of first regions and a second region therebetween, forming first patterns on the respective first regions to at least partially define a stepwise portion at the second region, and forming a dummy pattern that at least partially fills the stepwise portion. The dummy pattern may be an electrically floating structure. The dummy pattern may be formed as part of forming second patterns on the respective first regions, and the dummy pattern and the second patterns may include substantially common materials. Because the dummy pattern at least partially fills the stepwise portion at the second region, the material layer covering the second patterns and the dummy pattern may omit a corresponding stepwise portion.

公开(公告)号：US20180366468A1

公开(公告)日：2018-12-20

申请号：US16110658

申请日：2018-08-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jonghyuk PARK ,  Byoungho Kwon ,  Inho Kim ,  Hyesung Park ,  Jin-Woo Bae ,  Yanghee Lee ,  Inseak Hwang

IPC: H01L27/108 ,  H01L21/66

CPC classification number: H01L27/10855 ,  H01L22/32 ,  H01L22/34 ,  H01L27/10814 ,  H01L27/10817 ,  H01L27/10876 ,  H01L27/10894

Abstract: Provided are a semiconductor device and a method of fabricating the same. The semiconductor device may include a semiconductor substrate including a first region and a second region, a dummy separation pattern provided on the second region of the semiconductor substrate to have a recessed region at its upper portion, a first electrode provided on the first region of the semiconductor substrate, a dielectric layer covering the first electrode, a second electrode provided on the dielectric layer, and a remaining electrode pattern provided in the recessed region. The second electrode and the remaining electrode pattern may be formed of a same material.

公开(公告)号：US09496381B2

公开(公告)日：2016-11-15

申请号：US13716402

申请日：2012-12-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： Mongsup Lee ,  Yoonho Son ,  Woogwan Shim ,  Chan Min Lee ,  Inseak Hwang

IPC: H01L29/78 ,  H01L27/108

CPC classification number: H01L29/78 ,  H01L27/10876 ,  H01L27/10885 ,  H01L27/10888

Abstract: A semiconductor device may include a substrate including an active pattern delimited by a device isolation pattern, a gate electrode crossing the active pattern, a first impurity region and a second impurity region in the active pattern on both sides of the gate electrode, a bit line crossing the gate electrode, a first contact electrically connecting the first impurity region with the bit line, and a first nitride pattern on a lower side surface of the first contact. A width of the first contact measured perpendicular to an extending direction of the bit line may be substantially equal to that of the bit line.

Abstract translation: 半导体器件可以包括：衬底，其包括由器件隔离图案限定的有源图案，与有源图案交叉的栅极电极，栅电极两侧的有源图案中的第一杂质区域和第二杂质区域，位线 跨越栅电极，将第一杂质区与位线电连接的第一接触和第一接触的下侧表面上的第一氮化物图案。 垂直于位线的延伸方向测量的第一接触件的宽度可以基本上等于位线的宽度。

公开(公告)号：US20200235049A1

公开(公告)日：2020-07-23

申请号：US16839206

申请日：2020-04-03

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yunjung Choi ,  Kivin Im ,  Dongbok Lee ,  Inseak Hwang

IPC: H01L23/528 ,  H01L27/108 ,  H01L27/115

Abstract: Semiconductor devices are provided including a plurality of nonlinear bit lines formed on a substrate including a plurality of active areas; a plurality of word lines that pass through the plurality of active areas; an integral spacer that covers two sidewalls of the plurality of nonlinear bit lines and defines a plurality of spaces that expose two adjacent ones of the plurality of active areas; two conductive patterns that respectively abut on the two adjacent active areas in one of the plurality of spaces that is selected; and a contact separating insulation layer that is formed between the two conductive patterns in the one selected space.

公开(公告)号：US10658289B2

公开(公告)日：2020-05-19

申请号：US16150408

申请日：2018-10-03

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yunjung Choi ,  Kivin Im ,  Dongbok Lee ,  Inseak Hwang

IPC: H01L23/528 ,  H01L27/115 ,  H01L27/108

Abstract: Semiconductor devices are provided including a plurality of nonlinear bit lines formed on a substrate including a plurality of active areas; a plurality of word lines that pass through the plurality of active areas; an integral spacer that covers two sidewalls of the plurality of nonlinear bit lines and defines a plurality of spaces that expose two adjacent ones of the plurality of active areas; two conductive patterns that respectively abut on the two-adjacent active areas in one of the plurality of spaces that is selected; and a contact separating insulation layer that is formed between the two conductive patterns in the one selected space.

公开(公告)号：US20190035724A1

公开(公告)日：2019-01-31

申请号：US16150408

申请日：2018-10-03

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yunjung Choi ,  Kivin Im ,  Dongbok Lee ,  Inseak Hwang

IPC: H01L23/528 ,  H01L27/115 ,  H01L27/108

Abstract: Semiconductor devices are provided including a plurality of nonlinear bit lines formed on a substrate including a plurality of active areas; a plurality of word lines that pass through the plurality of active areas; an integral spacer that covers two sidewalls of the plurality of nonlinear bit lines and defines a plurality of spaces that expose two adjacent ones of the plurality of active areas; two conductive patterns that respectively abut on the two-adjacent active areas in one of the plurality of spaces that is selected; and a contact separating insulation layer that is formed between the two conductive patterns in the one selected space.