公开(公告)号：US10804198B2

公开(公告)日：2020-10-13

申请号：US16839206

申请日：2020-04-03

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yunjung Choi ,  Kivin Im ,  Dongbok Lee ,  Inseak Hwang

IPC: H01L23/528 ,  H01L27/108 ,  H01L27/115

Abstract: Semiconductor devices are provided including a plurality of nonlinear bit lines formed on a substrate including a plurality of active areas; a plurality of word lines that pass through the plurality of active areas; an integral spacer that covers two sidewalls of the plurality of nonlinear bit lines and defines a plurality of spaces that expose two adjacent ones of the plurality of active areas; two conductive patterns that respectively abut on the two adjacent active areas in one of the plurality of spaces that is selected; and a contact separating insulation layer that is formed between the two conductive patterns in the one selected space.

公开(公告)号：US20200235049A1

公开(公告)日：2020-07-23

申请号：US16839206

申请日：2020-04-03

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yunjung Choi ,  Kivin Im ,  Dongbok Lee ,  Inseak Hwang

IPC: H01L23/528 ,  H01L27/108 ,  H01L27/115

Abstract: Semiconductor devices are provided including a plurality of nonlinear bit lines formed on a substrate including a plurality of active areas; a plurality of word lines that pass through the plurality of active areas; an integral spacer that covers two sidewalls of the plurality of nonlinear bit lines and defines a plurality of spaces that expose two adjacent ones of the plurality of active areas; two conductive patterns that respectively abut on the two adjacent active areas in one of the plurality of spaces that is selected; and a contact separating insulation layer that is formed between the two conductive patterns in the one selected space.

公开(公告)号：US10658289B2

公开(公告)日：2020-05-19

申请号：US16150408

申请日：2018-10-03

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yunjung Choi ,  Kivin Im ,  Dongbok Lee ,  Inseak Hwang

IPC: H01L23/528 ,  H01L27/115 ,  H01L27/108

Abstract: Semiconductor devices are provided including a plurality of nonlinear bit lines formed on a substrate including a plurality of active areas; a plurality of word lines that pass through the plurality of active areas; an integral spacer that covers two sidewalls of the plurality of nonlinear bit lines and defines a plurality of spaces that expose two adjacent ones of the plurality of active areas; two conductive patterns that respectively abut on the two-adjacent active areas in one of the plurality of spaces that is selected; and a contact separating insulation layer that is formed between the two conductive patterns in the one selected space.

公开(公告)号：US20190035724A1

公开(公告)日：2019-01-31

申请号：US16150408

申请日：2018-10-03

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yunjung Choi ,  Kivin Im ,  Dongbok Lee ,  Inseak Hwang

IPC: H01L23/528 ,  H01L27/115 ,  H01L27/108

Abstract: Semiconductor devices are provided including a plurality of nonlinear bit lines formed on a substrate including a plurality of active areas; a plurality of word lines that pass through the plurality of active areas; an integral spacer that covers two sidewalls of the plurality of nonlinear bit lines and defines a plurality of spaces that expose two adjacent ones of the plurality of active areas; two conductive patterns that respectively abut on the two-adjacent active areas in one of the plurality of spaces that is selected; and a contact separating insulation layer that is formed between the two conductive patterns in the one selected space.

公开(公告)号：US10121744B2

公开(公告)日：2018-11-06

申请号：US15491227

申请日：2017-04-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yunjung Choi ,  Kivin Im ,  Dongbok Lee ,  Inseak Hwang

IPC: H01L23/528 ,  H01L27/108 ,  H01L27/115

Abstract: Semiconductor devices are provided including a plurality of nonlinear bit lines formed on a substrate including a plurality of active areas; a plurality of word lines that pass through the plurality of active areas; an integral spacer that covers two sidewalls of the plurality of nonlinear bit lines and defines a plurality of spaces that expose two adjacent ones of the plurality of active areas; two conductive patterns that respectively abut on the two adjacent active areas in one of the plurality of spaces that is selected; and a contact separating insulation layer that is formed between the two conductive patterns in the one selected space.

公开(公告)号：US09768115B2

公开(公告)日：2017-09-19

申请号：US14701777

申请日：2015-05-01

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yunjung Choi ,  Kivin Im ,  Dongbok Lee ,  Inseak Hwang

IPC: H01L27/108 ,  H01L27/115 ,  H01L23/528

CPC classification number: H01L23/528 ,  H01L27/10814 ,  H01L27/10823 ,  H01L27/10855 ,  H01L27/10885 ,  H01L27/10891 ,  H01L27/115 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Semiconductor devices are provided including a plurality of nonlinear bit lines formed on a substrate including a plurality of active areas; a plurality of word lines that pass through the plurality of active areas; an integral spacer that covers two sidewalls of the plurality of nonlinear bit lines and defines a plurality of spaces that expose two adjacent ones of the plurality of active areas; two conductive patterns that respectively abut on the two adjacent active areas in one of the plurality of spaces that is selected; and a contact separating insulation layer that is formed between the two conductive patterns in the one selected space.