公开(公告)号：US10897259B1

公开(公告)日：2021-01-19

申请号：US16853076

申请日：2020-04-20

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Shinwoong Kim ,  Myounggyun Kim ,  Chulho Kim ,  Inhyo Ryu ,  Jaewon Choi ,  Sangwook Han ,  Honggul Han

IPC: H03L7/087 ,  H03L7/089 ,  H03L7/095 ,  H03L7/14 ,  H03L7/091 ,  H03L7/099 ,  H03L7/195 ,  H03L7/093

Abstract: A phase locked circuit includes an oscillator configured to generate an output clock signal, a first phase detector configured to detect a phase difference between an input clock signal and a feedback clock signal based on the output clock signal, a second phase detector having a wider phase locking range than that of the first phase detector and configured to detect the phase difference between the input clock signal and the feedback clock signal, and a charge pump controller configured to control an output current of a charge pump included in the second phase detector based on the phase difference detected by the first phase detector. When the phase difference between the input clock signal and the feedback clock signal is within the phase locking range of the first phase detector, the oscillator and the first phase detector are connected to each other.

公开(公告)号：US20250070790A1

公开(公告)日：2025-02-27

申请号：US18808348

申请日：2024-08-19

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Minseob Lee ,  Sangmin Yoo ,  Joonhee Lee ,  Ikkyun Jo ,  Honggul Han

IPC: H03L7/197 ,  H03L7/097 ,  H03L7/099

Abstract: A phase-locked loop (PLL) circuit includes a voltage-controlled oscillator configured to generate an output clock signal of the PLL circuit, a phase detector configured to generate a phase error signal representing a phase difference between a first clock signal based on a reference clock signal and a second clock signal based on the output clock signal, a comparator configured to generate a phase error sign signal based on a reference voltage and the phase error signal, and a reference voltage generation circuit configured to scale first and second sign values of the phase error sign signal based on a fixed gain value and a variable gain value, respectively, and generate the reference voltage based on the scaled first and second sign values.