INTEGRATED CIRCUIT DEVICE AND METHOD OF MANUFACTURING THE SAME

    公开(公告)号:US20210005548A1

    公开(公告)日:2021-01-07

    申请号:US16742233

    申请日:2020-01-14

    Abstract: An integrated circuit device includes a first insulation layer on a substrate, a lower wiring structure in the first insulation layer and including a metal layer and a conductive barrier layer, such that the metal layer is on the conductive barrier layer, an etch stop layer overlapping an upper surface of the first insulation layer and an upper surface of the conductive barrier layer and having a first thickness, a capping layer overlapping a portion of the upper surface of the metal layer and having a second thickness which is less than the first thickness, a second insulation layer overlapping the etch stop layer and the capping layer, and an upper wiring structure connected to another portion of the upper surface of the metal layer not overlapped by the capping layer in the second insulation layer.

    NON-VOLATILE MEMORY DEVICE
    2.
    发明公开

    公开(公告)号:US20230162783A1

    公开(公告)日:2023-05-25

    申请号:US17952826

    申请日:2022-09-26

    CPC classification number: G11C11/4093 G11C11/4085 G11C11/4074

    Abstract: A non-volatile memory device includes: one or more memory blocks including a plurality of memory cells connected to a plurality of word lines, and a plurality of memory cell strings; a page buffer unit; one or more pass units including a plurality of pass transistors that may supply operation voltages to the plurality of word lines; one or more monitoring units including one or more monitoring pass transistors connected to the plurality of pass transistors; a voltage generator that may supply activation voltages to a first pass transistor, in which a leakage current is to be measured, and to the one or more monitoring pass transistors; and a control logic that may control the voltage generator to generate the activation voltages by using a voltage control signal and detect the leakage current based on monitoring voltages output from the one or more monitoring pass transistors.

    MEMORY DEVICE AND METHOD OF OPERATING WORDLINES

    公开(公告)号:US20240312540A1

    公开(公告)日:2024-09-19

    申请号:US18599471

    申请日:2024-03-08

    CPC classification number: G11C16/3459 G11C16/32 G11C16/3418

    Abstract: A memory device includes a leakage detector connected to each of a plurality of word lines and configured to obtain a program voltage and perform a leakage detection operation, and a control circuit configured to control a row decoder, a voltage generator, and the leakage detector, and to perform a leakage detection operation on the plurality of word lines. The control circuit may execute a loop including a first section and a second section, may control the program voltage not to be applied to the designated word line after a time in the first section, may use the leakage detector in response to execution of at least one designated loop to measure a voltage charged in the designated word line after the second section of the designated loop is terminated, and may perform the leakage detection operation on the basis of the measured voltage.

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