公开(公告)号：US09064597B2

公开(公告)日：2015-06-23

申请号：US14159369

申请日：2014-01-20

Applicant: Samsung Electronics Co., Ltd.

Inventor： Byungkyu Cho ,  Changyun Lee ,  Sunghoi Hur

IPC: G11C16/04 ,  G11C16/34 ,  G11C16/26

CPC classification number: G11C16/3427 ,  G11C16/0483 ,  G11C16/26

Abstract: In a read step or a program (write) verification step of a semiconductor memory device, read voltages different from one another are applied to a pair of word lines respectively disposed on both sides of a selected word line to suppress the enlargement of program distribution.

Abstract translation: 在半导体存储器件的读取步骤或程序（写入）验证步骤中，彼此不同的读取电压被施加到分别设置在所选字线的两侧上的一对字线，以抑制程序分配的扩大。

公开(公告)号：US20140133223A1

公开(公告)日：2014-05-15

申请号：US14159369

申请日：2014-01-20

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Byungkyu Cho ,  Changyun Lee ,  Sunghoi Hur

IPC: G11C16/34

CPC classification number: G11C16/3427 ,  G11C16/0483 ,  G11C16/26

Abstract: In a read step or a program (write) verification step of a semiconductor memory device, read voltages different from one another are applied to a pair of word lines respectively disposed on both sides of a selected word line to suppress the enlargement of program distribution.

Abstract translation: 在半导体存储器件的读取步骤或程序（写入）验证步骤中，彼此不同的读取电压被施加到分别设置在所选字线的两侧上的一对字线，以抑制程序分配的扩大。