公开(公告)号：US20230389310A1

公开(公告)日：2023-11-30

申请号：US17994175

申请日：2022-11-25

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： KEUNNAM KIM ,  KISEOK LEE ,  BYEONGJOO KU

IPC: H10B41/40 ,  H10B41/10 ,  H10B41/20 ,  H10B43/10 ,  H10B43/40 ,  H10B43/20 ,  H01L23/528

CPC classification number: H01L27/11526 ,  H01L27/11519 ,  H01L27/11551 ,  H01L27/11565 ,  H01L27/11573 ,  H01L27/11578 ,  H01L23/5283

Abstract: A semiconductor memory device includes; a substrate and an insulating layer on the substrate, first and second peripheral active regions on the insulating layer, each having a first surface and an opposing second surface, a device isolation layer between the first and second peripheral active regions to isolate the first and second peripheral active regions, a bit line connected to at least one of the first surface of the first peripheral active region and the first surface of the second peripheral active region, a first gate insulating layer provided on the second surfaces of the first and second peripheral active regions, a first peripheral gate electrode disposed on the first gate insulating layer and a second peripheral gate electrode disposed on the second gate insulating layer, and a contact pattern connected to the bit line, wherein each of the first peripheral active region and the second peripheral active region is floated in relation to the substrate by the insulating layer.

公开(公告)号：US20210036101A1

公开(公告)日：2021-02-04

申请号：US16947090

申请日：2020-07-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： YOONYOUNG CHOI ,  BYUNGHYUN LEE ,  BYEONGJOO KU ,  SEUNGJIN KIM ,  SANGJAE PARK ,  JINWOO BAE ,  HANGEOL LEE ,  BOWO CHOI ,  HYUNSIL HONG

IPC: H01L49/02

Abstract: Capacitor forming methods may include sequentially forming a first mold layer, a first support material layer, and a second mold layer on a substrate, forming a mask pattern on the second mold layer, forming a recess in the second mold layer, the first support material layer, and the first mold layer using the mask pattern as a mask, forming a lower electrode in the recess, removing the mask pattern by a dry cleaning process, reducing a width of an upper portion of the lower electrode, removing the first mold layer, forming a dielectric layer on a surface of the lower electrode, and forming an upper electrode on the dielectric layer.