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公开(公告)号：US20250016917A1
公开(公告)日：2025-01-09
申请号：US18640207
申请日：2024-04-19
Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
Inventor： Jin Uk LEE , Chi Hyeon JEONG , Youn Gyu HAN
Abstract: The present disclosure relates to a printed circuit board including: an insulating layer; and a plurality of wiring layers disposed in the insulating layer, wherein the plurality of wiring layers include a first wiring layer, a second wiring layer disposed on the first wiring layer, and a third wiring layer disposed on the second wiring layer, the second wiring layer is thicker than each of the first and third wiring layers, and the second wiring layer includes one or microcircuit patterns and has an aspect ratio, which is a ratio of a height to a line width, being 2.4 to 3.6.
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公开(公告)号：US20150212619A1
公开(公告)日：2015-07-30
申请号：US14291641
申请日：2014-05-30
Applicant: Samsung Electro-Mechanics Co., Ltd.
Inventor： Young Seuck YOO , Kang Heon HUR , Jae Hun KIM , Dek Gin YANG , Jin Uk LEE , Seung Joo SHIN , Hyun Chul JUNG
IPC: G06F3/044
CPC classification number: G06F3/041 , G06F2203/04103 , G06F2203/04112 , Y10T29/49162
Abstract: Embodiments of the invention provide a touch sensor including a base substrate, and electrode patterns formed of metal wires which are formed by stacking at least two electrode layers on the base substrate and have groove portions formed on both sides thereof. The groove portions are filled with anticorrosive members.
Abstract translation: 本发明的实施例提供了一种触摸传感器，其包括基底基板和由金属线形成的电极图案，所述电极图案通过在基底基板上堆叠至少两个电极层而形成，并且在其两侧形成有沟槽部分。 槽部填充有防腐蚀构件。
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公开(公告)号：US20250125238A1
公开(公告)日：2025-04-17
申请号：US18379304
申请日：2023-10-12
Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
Inventor： Jin Uk LEE , Gopal Garg
IPC: H01L23/498 , H01L23/00 , H01L25/065 , H01L25/18
Abstract: A semiconductor package includes a first substrate including a first insulating layer and a first wiring layer disposed on or in the first insulating layer; first and second packages disposed on the first substrate, and each including a substrate, a semiconductor chip on the substrate, connection members connecting the substrate to the semiconductor chip, and a SERDES chip embedded in the substrate; 1-1 connection members connecting the first substrate to the first package; and 2-1 connection members connecting the first substrate to the second package. The number of connection members of the first package is greater than the number of 1-1 connection members. The number of connection members of the second package is greater than the number of 2-1 connection members.
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公开(公告)号：US20250168980A1
公开(公告)日：2025-05-22
申请号：US18663279
申请日：2024-05-14
Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
Inventor： Min Gyu PARK , Jin Uk LEE , Kee Ju UM
Abstract: A printed circuit board includes an insulating layer, a through-hole including a first region penetrating through a portion of the insulating layer from an upper surface of the insulating layer and a second region penetrating through another portion of the insulating layer from a lower surface of the insulating layer, and a metal via including a first metal layer disposed in a portion of the first region, a second metal layer disposed above the first metal layer and disposed in another portion of the first region, and a third metal layer disposed below the first metal layer and disposed in the second region. An upper surface of the first metal layer is located below the upper surface of the insulating layer.
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公开(公告)号：US20220167502A1
公开(公告)日：2022-05-26
申请号：US17189756
申请日：2021-03-02
Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
Inventor： Jin Uk LEE , Young Ook CHO , Eun Sun KIM , Young Hun YOU
IPC: H05K1/11
Abstract: A printed circuit board includes: a first insulating layer; a via pad including a first layer embedded in the first insulating layer and a second layer disposed on the first layer; and a first via layer disposed on the via pad, wherein the second layer has a width decreasing in a direction away from the first layer in a stacking direction of the first and second layers.
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Patent Agency Ranking
公开(公告)号：US20150227170A1
公开(公告)日：2015-08-13
申请号：US14602875
申请日：2015-01-22
Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
Inventor： Sung Ho KIM , Jae Hun KIM , Jin Uk LEE
CPC classification number: G06F1/1643 , B32B2457/208 , G06F3/044 , G06F2203/04103 , Y10T156/10
Abstract: Embodiments of the invention provide a touch sensor, including a first window substrate, a dam formed along an edge of the first window substrate, and a polymer layer formed on the first window substrate in an inside direction of the dam. According to at least one embodiment, the touch sensor further includes a bezel formed to be disposed outside the dam and formed on the first window substrate, and a second window substrate having one surface formed to face the first window substrate and the other surface provided with an electrode pattern, and provided with an electrode wiring, which is electrically connected to the electrode pattern.
Abstract translation: 本发明的实施例提供了一种触摸传感器，包括第一窗口基板，沿着第一窗口基板的边缘形成的坝，以及在坝的内部方向上形成在第一窗户基板上的聚合物层。 根据至少一个实施例，触摸传感器还包括形成为设置在坝外部并形成在第一窗口基板上的边框，以及第二窗口基板，其具有形成为面对第一窗口基板的一个表面，而另一个表面设置有 电极图案，并且设置有电连接到电极图案的电极配线。
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公开(公告)号：US20150041301A1
公开(公告)日：2015-02-12
申请号：US14452514
申请日：2014-08-05
Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
Inventor： Jin Uk LEE , Nam Keun OH , Seung Joo SHIN , Jang Ho PARK
CPC classification number: G06F1/1692 , G06F3/044 , G06F2203/04112
Abstract: There is provided a touch sensor including: a base substrate; a first electrode pattern formed on the base substrate and including first electrode lines repeatedly arranged in parallel with each other; and a second electrode pattern formed on a surface spaced apart from a surface on which the first electrode pattern is formed and including second electrode lines intersecting with the first electrode lines and repeatedly arranged in parallel with each other, wherein an extension line connecting intersection points between the first and second electrode lines to each other is formed as an oblique line with respect to a horizontal direction.
Abstract translation: 提供了一种触摸传感器，包括：基底; 第一电极图案，形成在所述基底基板上，并且包括彼此平行重复布置的第一电极线; 以及形成在与形成有第一电极图案的表面间隔开的表面的第二电极图案，并且包括与第一电极线相交并且重复地彼此平行布置的第二电极线，其中延伸线连接 第一和第二电极线相对于水平方向形成为斜线。
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公开(公告)号：US20250098067A1
公开(公告)日：2025-03-20
申请号：US18592291
申请日：2024-02-29
Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
Inventor： Chi Hyeon JEONG , Jin Uk LEE , Hyun Sang KWAK , Seok Hwan KIM
Abstract: The present disclosure relates to a printed circuit board including: an insulating layer; a through-hole penetrating between an upper surface and a lower surface of the insulating layer opposing in a thickness direction; a metal wiring disposed inside the through-hole; and a metal via filling the through-hole and covering the metal wire.
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公开(公告)号：US20240049389A1
公开(公告)日：2024-02-08
申请号：US18104526
申请日：2023-02-01
Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
Inventor： Jin Uk LEE , Youn Gyu HAN , Chang Hwa PARK , Yong Duk LEE
CPC classification number: H05K1/115 , H05K1/185 , H05K3/4644 , H05K3/4697 , H01L23/49827 , H05K1/0313 , H05K1/05 , H05K2201/10734
Abstract: A printed circuit board includes: a bridge including a first insulating material, a wiring pattern disposed in the first insulating layer, a metal post disposed on the first insulating material and connected to the wiring pattern, and a second insulating material disposed on the first insulating material and covering at least a portion of the metal post; a first build-up insulating material disposed around the bridge; and a first redistribution pattern disposed on the second insulating material and the first build-up insulating material and including a metal pad connected to the metal post.
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公开(公告)号：US20230199951A1
公开(公告)日：2023-06-22
申请号：US17742916
申请日：2022-05-12
Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
Inventor： Jin Uk LEE , Chi Won HWANG , Eun Sun KIM
CPC classification number: H05K1/111 , H05K1/0298 , H05K1/115 , H05K1/181 , H05K2201/10159
Abstract: A printed circuit board includes: a wiring substrate including a plurality of insulating layers, a plurality of wiring layers, and a plurality of via layers; and a bridge embedded in the wiring substrate and having a plurality of connection pads thereon. An uppermost wiring layer of the plurality of wiring layers includes a plurality of bump pads connected to the plurality of connection pads, and a pitch between at least two adjacent connection pads of the plurality of connection pads is larger than a pitch between at least two adjacent ones of the plurality of bump pads.
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