公开(公告)号：US09628202B2

公开(公告)日：2017-04-18

申请号：US14633966

申请日：2015-02-27

Applicant: Rohde & Schwarz GmbH & Co. KG

Inventor： Gottfried Holzmann ,  Ralf Plaumann ,  Peter Wolanin ,  Wilfried Dilling ,  Rudolf Schindlmeier ,  Rolf Lorenzen ,  Anton Steinegger ,  Werner Mittermaier

IPC: H04B17/00 ,  G06F11/22 ,  G06F11/273

CPC classification number: H04B17/0085 ,  G06F11/2294 ,  G06F11/273

Abstract: A testing front end module for testing a plurality of devices under test (DUT) includes a testing signal interface, a vector signal generator (VSG) coupled to the testing signal interface and configured to generate testing signals upon reception of testing routine signals from a remote controller via the testing signal interface, a vector signal analyzer (VSA) coupled to the testing signal interface and configured to receive testing response signals from a plurality of DUTs and to transmit the received testing response signals to the remote controller via the testing signal interface, a multiplexer/demultiplexer (MUX/DEMUX) coupled to the VSG and the VSA, the MUX/DEMUX being configured to multiplex the received testing response signals and to demultiplex the generated testing signals, and a test device interface coupled to the MUX/DEMUX and configured to couple the testing front end module to the plurality of DUTs.