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公开(公告)号:US20150235943A1
公开(公告)日:2015-08-20
申请号:US14701541
申请日:2015-05-01
Applicant: Renesas Electronics Corporation
Inventor: Naohito SUZUMURA , Yoshihiro OKA
IPC: H01L23/522 , H01L23/532
CPC classification number: H01L23/5226 , H01L21/768 , H01L21/76807 , H01L21/7682 , H01L21/76825 , H01L21/76826 , H01L21/76831 , H01L21/76835 , H01L23/5222 , H01L23/53238 , H01L23/5329 , H01L23/53295 , H01L23/538 , H01L23/5384 , H01L24/05 , H01L2221/1036 , H01L2221/1047 , H01L2224/02166 , H01L2224/05556 , H01L2924/1306 , H01L2924/00
Abstract: A semiconductor device is provided in which reliability of the semiconductor device is improved by improving an EM characteristic, a TDDB characteristic, and a withstand voltage characteristic of the semiconductor device. An average diameter of first vacancies in a lower insulating layer which configures an interlayer insulating film of a porous low-k film for embedding a wiring therein, is made smaller than an average diameter of second vacancies in an upper insulating layer, and thereby an elastic modulus is increased in the lower insulating layer. Further, a side wall insulating layer which is a dense layer including the first vacancies having an average diameter smaller than the second vacancies is formed on the surface of the interlayer insulating film exposed on a side wall of a wiring trench.
Abstract translation: 提供一种通过改善半导体器件的EM特性,TDDB特性和耐电压特性来提高半导体器件的可靠性的半导体器件。 使构成用于在其中嵌入布线的多孔低k膜的层间绝缘膜的下绝缘层中的第一空位的平均直径小于上绝缘层中的第二空位的平均直径,从而弹性 下绝缘层的模量增加。 此外,在布线沟槽的侧壁上暴露的层间绝缘膜的表面上形成作为包含平均直径小于第二空位的第一空位的致密层的侧壁绝缘层。
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公开(公告)号:US20130341793A1
公开(公告)日:2013-12-26
申请号:US13909551
申请日:2013-06-04
Applicant: Renesas Electronics Corporation
Inventor: Naohito SUZUMURA , Yoshihiro OKA
IPC: H01L23/538 , H01L21/768
CPC classification number: H01L23/5226 , H01L21/768 , H01L21/76807 , H01L21/7682 , H01L21/76825 , H01L21/76826 , H01L21/76831 , H01L21/76835 , H01L23/5222 , H01L23/53238 , H01L23/5329 , H01L23/53295 , H01L23/538 , H01L23/5384 , H01L24/05 , H01L2221/1036 , H01L2221/1047 , H01L2224/02166 , H01L2224/05556 , H01L2924/1306 , H01L2924/00
Abstract: To improve reliability of a semiconductor device by improving an EM characteristic, a TDDB characteristic, and a withstand voltage characteristic of the semiconductor device.An average diameter of first vacancies in a lower insulating layer which configures an interlayer insulating film of a porous low-k film for embedding a wiring therein, is made smaller than an average diameter of second vacancies in an upper insulating layer, and thereby an elastic modulus is increased in the lower insulating layer. Further, a side wall insulating layer which is a dense layer including the first vacancies having an average diameter smaller than the second vacancies is formed on the surface of the interlayer insulating film exposed on a side wall of a wiring trench.
Abstract translation: 通过改善半导体器件的EM特性,TDDB特性和耐电压特性来提高半导体器件的可靠性。 使构成用于在其中嵌入布线的多孔低k膜的层间绝缘膜的下绝缘层中的第一空位的平均直径小于上绝缘层中的第二空位的平均直径,从而弹性 下绝缘层的模量增加。 此外,在布线沟槽的侧壁上暴露的层间绝缘膜的表面上形成作为包含平均直径小于第二空位的第一空位的致密层的侧壁绝缘层。
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