公开(公告)号：US20160093499A1

公开(公告)日：2016-03-31

申请号：US14869988

申请日：2015-09-29

Applicant: Renesas Electronics Corporation

Inventor： Kazuharu YAMABE ,  Shinichiro ABE ,  Shoji YOSHIDA ,  Hideaki YAMAKOSHI ,  Toshio KUDO ,  Seiji MURANAKA ,  Fukuo OWADA ,  Daisuke OKADA

IPC: H01L21/28 ,  H01L29/51 ,  H01L29/66

CPC classification number: H01L21/28282 ,  H01L21/28194 ,  H01L29/66833 ,  H01L29/792

Abstract: To provide a semiconductor device having improved performance while improving the throughput in the manufacturing steps of the semiconductor device. An insulating film portion comprised of first, second, third, fourth, and fifth insulating films is formed on a semiconductor substrate. The second insulating film is a first charge storage film and the fourth insulating film is a second charge storage film. The first charge storage film contains silicon and nitrogen; the third insulating film contains silicon and oxygen; and the second charge storage film contains silicon and nitrogen. The thickness of the third insulating film is smaller than that of the first charge storage film and the thickness of the second charge storage film is greater than that of the first charge storage film. The third insulating film is formed by treating the upper surface of the first charge storage film with a water-containing treatment liquid.

Abstract translation: 提供具有改进性能的半导体器件，同时提高半导体器件的制造步骤中的吞吐量。 在半导体衬底上形成由第一，第二，第三，第四和第五绝缘膜构成的绝缘膜部分。 第二绝缘膜是第一电荷存储膜，第四绝缘膜是第二电荷存储膜。 第一电荷储存膜含有硅和氮; 第三绝缘膜含有硅和氧; 并且第二电荷储存膜含有硅和氮。 第三绝缘膜的厚度小于第一电荷存储膜的厚度，并且第二电荷存储膜的厚度大于第一电荷存储膜的厚度。 第三绝缘膜通过用含水处理液处理第一电荷存储膜的上表面而形成。

公开(公告)号：US20160190145A1

公开(公告)日：2016-06-30

申请号：US14972260

申请日：2015-12-17

Applicant: Renesas Electronics Corporation

Inventor： Keiichi MAEKAWA ,  Shoji YOSHIDA ,  Takashi TAKEUCHI ,  Hiroshi YANAGITA

IPC: H01L27/112

CPC classification number: H01L27/11206 ,  G11C17/12 ,  G11C17/16 ,  H01L23/5252

Abstract: A semiconductor device includes an SOI substrate and an anti-fuse element formed on the SOI substrate. The SOI substrate has a p type well region formed on a main surface side of a support substrate and an SOI layer formed on the p type well region via a BOX layer. The anti-fuse element has a gate electrode formed on the SOI layer via agate insulating film. The anti-fuse element constitutes a storage element, and a first potential is applied to the gate electrode and a second potential of the same polarity as the first potential is applied to the p type well region in a write operation of the storage element.

Abstract translation: 半导体器件包括形成在SOI衬底上的SOI衬底和抗熔丝元件。 SOI衬底具有通过BOX层形成在支撑衬底的主表面侧的p型阱区和在p型阱区上形成的SOI层。 反熔丝元件具有通过玛瑙绝缘膜在SOI层上形成的栅电极。 反熔丝元件构成存储元件，并且在存储元件的写入操作中，向栅电极施加第一电位，并将与第一电位相同极性的第二电位施加到p型阱区。

公开(公告)号：US20160099358A1

公开(公告)日：2016-04-07

申请号：US14872089

申请日：2015-09-30

Applicant: Renesas Electronics Corporation

Inventor： Yoshiyuki KAWASHIMA ,  Shoji YOSHIDA

IPC: H01L29/792 ,  H01L21/28 ,  H01L21/324 ,  H01L29/66

CPC classification number: H01L29/7923 ,  H01L21/28176 ,  H01L21/28282 ,  H01L21/3003 ,  H01L21/324 ,  H01L27/11573 ,  H01L29/513 ,  H01L29/665 ,  H01L29/66545 ,  H01L29/6659 ,  H01L29/66833 ,  H01L29/792

Abstract: A semiconductor device including a nonvolatile memory cell and a field effect transistor together is improved in performance. In a method of manufacturing a semiconductor device, a hydrogen-containing insulating film is formed before heat treatment of a semiconductor wafer, the hydrogen-containing insulating film covering a gate electrode and agate insulating film in a region that will have a memory cell therein, and exposing a region that will have therein a MISFET configuring a peripheral circuit. Consequently, hydrogen in the hydrogen-containing insulating film is diffused into an interface between the gate insulating film and the semiconductor substrate, and thereby a defect at the interface is selectively repaired.

Abstract translation: 包括非易失性存储单元和场效应晶体管在一起的半导体器件性能得到改善。 在制造半导体器件的方法中，在半导体晶片的热处理之前，在其中将具有存储单元的区域中覆盖栅电极和玛瑙绝缘膜的含氢绝缘膜形成含氢绝缘膜， 以及暴露其中将具有配置外围电路的MISFET的区域。 因此，含氢绝缘膜中的氢扩散到栅极绝缘膜和半导体衬底之间的界面，从而选择性地修复界面处的缺陷。