公开(公告)号：US11176979B2

公开(公告)日：2021-11-16

申请号：US16803454

申请日：2020-02-27

申请人： Regents of the University of Minnesota

发明人： Jian-Ping Wang ,  Sachin S. Sapatnekar ,  Ulya R. Karpuzcu ,  Zhengyang Zhao ,  Masoud Zabihi ,  Michael Salonik Resch ,  Zamshed I. Chowdhury ,  Thomas Peterson

IPC分类号： G11C11/00 ,  G11C11/16

摘要： A logic-memory cell includes a spin-orbit torque device having first, second and third terminals configured such that current between the second and third terminals is capable of changing a resistance between the first and second terminals. In the cell, a first transistor is connected between a logic connection line and the first terminal of the spin-orbit torque device and a second transistor is connected between the logic connection line and the third terminal of the spin-orbit torque device.

公开(公告)号：US20200279597A1

公开(公告)日：2020-09-03

申请号：US16803454

申请日：2020-02-27

申请人： Regents of the University of Minnesota

发明人： Jian-Ping Wang ,  Sachin S. Sapatnekar ,  Ulya R. Karpuzcu ,  Zhengyang Zhao ,  Masoud Zabihi ,  Michael Salonik Resch ,  Zamshed I. Chowdhury ,  Thomas Peterson

IPC分类号： G11C11/16

摘要： A logic-memory cell includes a spin-orbit torque device having first, second and third terminals configured such that current between the second and third terminals is capable of changing a resistance between the first and second terminals. In the cell, a first transistor is connected between a logic connection line and the first terminal of the spin-orbit torque device and a second transistor is connected between the logic connection line and the third terminal of the spin-orbit torque device.