摘要:
Methods of fabricating an integrated circuit with a fin-based fuse, and the resulting integrated circuit with a fin-based fuse are provided. In the method, a fin is created from a layer of semiconductor material and has a first end and a second end. The method provides for forming a conductive path on the fin from its first end to its second end. The conductive path is electrically connected to a programming device that is capable of selectively directing a programming current through the conductive path to cause a structural change in the conductive path to increase resistance across the conductive path.
摘要:
Methods of fabricating an integrated circuit with a fin-based fuse, and the resulting integrated circuit with a fin-based fuse are provided. In the method, a fin is created from a layer of semiconductor material and has a first end and a second end. The method provides for forming a conductive path on the fin from its first end to its second end. The conductive path is electrically connected to a programming device that is capable of selectively directing a programming current through the conductive path to cause a structural change in the conductive path to increase resistance across the conductive path.
摘要:
A method includes designating a cell mismatch parameter of a memory cell including a plurality of transistors and an initial value of a transistor mismatch parameter for each of the plurality of transistors. A critical current sensitivity parameter is determined for each of the plurality of transistors based on the transistor mismatch parameters in a computing apparatus. The cell mismatch parameter is distributed across the plurality of transistors in the computing apparatus to update the individual transistor mismatch parameters for each of the plurality of transistors based on the critical current sensitivity parameters and the cell mismatch parameter. The memory cell is simulated based on the individual transistor mismatch parameters to generate a simulation result.
摘要:
A method includes designating a cell mismatch parameter of a memory cell including a plurality of transistors and an initial value of a transistor mismatch parameter for each of the plurality of transistors. A critical current sensitivity parameter is determined for each of the plurality of transistors based on the transistor mismatch parameters in a computing apparatus. The cell mismatch parameter is distributed across the plurality of transistors in the computing apparatus to update the individual transistor mismatch parameters for each of the plurality of transistors based on the critical current sensitivity parameters and the cell mismatch parameter. The memory cell is simulated based on the individual transistor mismatch parameters to generate a simulation result.
摘要:
A memory cell includes a storage element and a read port. The read port includes a first transistor having a first gate coupled to the storage element, a first source region, and a first drain region. The second transistor includes a second gate, a second source region coupled to the first drain region, and a second drain region. A first dopant profile of the first and second source regions is asymmetric with respect to a second dopant profile of the first and second drain regions.
摘要:
An approach for methodology, and an associated system, enabling a prioritizing of devices, circuits, and modules of interest is disclosed. Embodiments include: determining a first electrical layout indicating an electrical performance of a physical layout of an IC design, the first electrical layout indicating a plurality of devices of the physical layout; selecting a subset of the plurality of the devices based on one or more connections of the devices; and generating a second electrical layout indicating the electrical performance of the physical layout, the second electrical layout indicating the selected devices without at least one of the plurality of devices.
摘要:
The present invention comprises using error propagation for building feature spaces with variable uncertainty and using variable-bandwidth mean shift for the analysis of such spaces, to provide peak detection and space partitioning. The invention applies these techniques to construct and analyze Hough spaces for line and geometrical shape detection, as well as to detect objects that are represented by peaks in the Hough space. This invention can be further used for background modeling by taking into account the uncertainty of the transformed image color and uncertainty of the motion flow. Furthermore, the invention can be used to segment video data in invariant spaces, by propagating the uncertainty from the original space and using the variable-bandwidth mean shift to detect peaks. The invention can be used in a variety of applications such as medical, surveillance, monitoring, automotive, augmented reality, and inspection.
摘要:
An integrated circuit is provided with a test circuit element and one or more further circuit elements. The performance of the test circuit element at various settings of a performance controlling parameter is determined. That performance controlling parameter is then applied across the one or more further circuit elements. The integrated circuit may include memory banks and the performance controlling parameter can be sense amplifier timing, delay line length or another parameter such as operating voltage, operating frequency and circuit timing in general.
摘要:
A method for dynamic scene modeling and change detection applicable to motion analysis utilizes optical flow for capturing and modeling the dynamics of the scene. Uncertainties in the measurements are evaluated and utilized in order to develop a robust representation of the scene in a higher dimensional space. In another embodiment, a dynamical model of the scene is developed that utilizes multiple past frames to predict the next frame. Incremental methods for updating the model are developed and, towards detection of events, a new measure is introduced that is based on a state-driven comparison between the prediction and the actual observation.
摘要:
A method and system for video-based encroachment detection are provided, the method including receiving first and second images, modeling a background from the first image, subtracting the background from the second image to provide a detection map, calibrating the size of an object from the pixel level, integrating a projection of the object with the detection map using dynamic programming, and detecting the object in a region if the projection matches that region of the detection map; and the system including a processor, a background modeling unit coupled with the processor for modeling a background from the first image and subtracting the background from the second image to provide a detection map, and a dynamic programming unit coupled with the processor for calibrating the size of an object from the pixel level, integrating a projection of the object with the detection map, and detecting the object in a region if the projection matches that region of the detection map.