摘要:
A decoder, encoder and corresponding system are disclosed for providing fast Forward Error Correcting (FEC) decoding and encoding of syndrome-based error correcting codes. Three-parallel processing is performed by elements of the system. More particularly, in an illustrative embodiment, a decoder performs three-parallel syndrome generation and error determination and calculations, and an encoder performs three-parallel encoding. Low power and complexity techniques are used to save cost and power yet provide relatively high speed encoding and decoding.
摘要:
A decoder, encoder and corresponding system are disclosed for providing fast Forward Error Correcting (FEC) decoding and encoding of syndrome-based error correcting codes. Three-parallel processing is performed by elements of the system. More particularly, in an illustrative embodiment, a decoder performs three-parallel syndrome generation and error determination and calculations, and an encoder performs three-parallel encoding. Low power and complexity techniques are used to save cost and power yet provide relatively high speed encoding and decoding.
摘要:
A decoder, encoder and corresponding system are disclosed for providing fast Forward Error Correcting (FEC) decoding and encoding of syndrome-based error correcting codes. Three-parallel processing is performed by elements of the system. More particularly, in an illustrative embodiment, a decoder performs three-parallel syndrome generation and error determination and calculations, and an encoder performs three-parallel encoding. Low power and complexity techniques are used to save cost and power yet provide relatively high speed encoding and decoding.
摘要:
A decoder, encoder and corresponding system are disclosed for providing fast Forward Error Correcting (FEC) decoding and encoding of syndrome-based error correcting codes. Three-parallel processing is performed by elements of the system. More particularly, in an illustrative embodiment, a decoder performs three-parallel syndrome generation and error determination and calculations, and an encoder performs three-parallel encoding. Low power and complexity techniques are used to save cost and power yet provide relatively high speed encoding and decoding.
摘要:
A data structure, method and protocol wherein synchronization data indicative of a data frame delineation point is inserted within an inter-packet gap (IPG) proximate a data frame during transmission. Optionally, a cyclical redundancy check (CRC) length indicative data, pointer data, and other data is inserted within the IPG to further insure appropriate delineation of data frames within a data stream.
摘要:
A decoder, encoder and corresponding system are disclosed for providing fast Forward Error Correcting (FEC) decoding and encoding of syndrome-based error correcting codes. Three-parallel processing is performed by elements of the system. More particularly, in an illustrative embodiment, a decoder performs three-parallel syndrome generation and error determination and calculations, and an encoder performs three-parallel encoding. Low power and complexity techniques are used to save cost and power yet provide relatively high speed encoding and decoding.
摘要:
A method of decoding interleaved Reed-Solomon codes to achieve an improved performance for burst errors is described. The method takes advantage of both interleaving and erasure decoding to increase the error correcting capability of a system without necessarily depending on channel reliability information. The observed correlation of burst errors in interleaved systems is advantageously used to achieve an improved error-correcting system, wherein a first code word is decoded, and the error locations in the first codeword are used to determine erasures for the remaining code words in the same interleaving block, and finally, decoding the remaining code words in parallel.
摘要:
In accordance with the teachings described herein, systems and methods are provided for calibrating DC offset in a receiver. A DC calibration circuit may be used that is configured to remove DC offset from a digital multi-carrier modulated (MCM) signal that includes a sequence of MCM symbols. The DC calibration circuit may include an accumulator and a compensator. The accumulator may be used to determine an estimated DC offset of a current MCM symbol in the sequence of MCM symbols. The compensator may be used to remove the estimated DC offset from a next MCM symbol in the sequence of MCM symbols. The accumulator may also be used to receive a plurality of digital samples that comprise the current MCM symbol and to determine the estimated DC offset by calculating an average of the plurality of digital samples.
摘要:
One or more communications parameters associated with a multiple input, multiple output (MIMO) signal transmitted by a transmitter are identified. The one or more communications parameters include one or more of (i) a number of receive antennas via which the MIMO signal is received, (ii) a number of spatial streams in the MIMO signal, and (iii) a signal to noise ratio (SNR) corresponding to the MIMO signal. A particular data detection technique of a plurality of data detection techniques employed by a receiver is selected in accordance with at least one of the one or more communications parameters.
摘要:
Systems and methods are provided for decoding signal vectors in multiple-input multiple-output (MIMO) systems, where a receiver has received one or more signal vectors from the same transmitted vector. The receiver processes these received signal vectors one by one, and uses information from signal vectors that have already been processed to process the next signal vector. To process a current signal vector, the receiver concatenates the current signal vector with a previously processed signal vector. This concatenated signal vector is decoded using, for example, a maximum-likelihood (ML). To decode the concatenated signal vector, the ML decoder can use a concatenated channel matrix that includes a channel response matrix associated with the current signal vector and a processed version of previous channel response matrices.