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    GRAPH CACHING
    1.
    发明申请
    GRAPH CACHING 有权
    图形缓存

    公开(公告)号：US20120143854A1

    公开(公告)日：2012-06-07

    申请号：US13311244

    申请日：2011-12-05

    Applicant: Rajan Goyal ,  Muhammad Raghib Hussain ,  Trent Parker

    Inventor： Rajan Goyal ,  Muhammad Raghib Hussain ,  Trent Parker

    IPC: G06F17/30

    CPC classification number: H04L63/1408 ,  G06F9/4498 ,  G06F17/30958 ,  G06F17/30985

    Abstract: In a method and apparatus for analyzing nodes of a Deterministic Finite Automata (DFA), an accessibility ranking, based on a DFA graph geometrical configuration, may be determined in order to determine cacheable portions of the DFA graph in order to reduce the number of external memory accesses. A walker process may be configured to walk the graph in a graph cache as well as main memory. The graph may be generated in a manner allowing each arc to include information if the node it is pointing to is stored in the graph cache or in main memory. The walker may use this information to determine whether or not to access the next arc in the graph cache or in main memory.

    Abstract translation: 在用于分析确定性有限自动机（DFA）的节点的方法和装置中，可以确定基于DFA图形几何配置的可访问性排序，以便确定DFA图形的可缓存部分，以减少外部数量 内存访问 步行者进程可以被配置为在图形缓存以及主存储器中走图。 可以以允许每个弧包括其指向的节点被存储在图形高速缓存或主存储器中的信息的方式生成图。 步行者可以使用该信息来确定是否访问图形缓存或主存储器中的下一个弧。

    Graph caching
    2.
    发明授权
    Graph caching 有权
    图形缓存

    公开(公告)号：US08086609B2

    公开(公告)日：2011-12-27

    申请号：US11982391

    申请日：2007-11-01

    Applicant: Rajan Goyal ,  Muhammad Raghib Hussain ,  Trent Parker

    Inventor： Rajan Goyal ,  Muhammad Raghib Hussain ,  Trent Parker

    IPC: G06F17/30

    CPC classification number: H04L63/1408 ,  G06F9/4498 ,  G06F17/30958 ,  G06F17/30985

    Abstract: In a method and apparatus for analyzing nodes of a Deterministic Finite Automata (DFA), an accessibility ranking, based on a DFA graph geometrical configuration, may be determined in order to determine cacheable portions of the DFA graph in order to reduce the number of external memory accesses. A walker process may be configured to walk the graph in a graph cache as well as main memory. The graph may be generated in a manner allowing each arc to include information if the node it is pointing to is stored in the graph cache or in main memory. The walker may use this information to determine whether or not to access the next arc in the graph cache or in main memory.

    Abstract translation: 在用于分析确定性有限自动机（DFA）的节点的方法和装置中，可以确定基于DFA图形几何配置的可访问性排序，以便确定DFA图形的可缓存部分，以减少外部数量 内存访问 步行者进程可以被配置为在图形缓存以及主存储器中走图。 可以以允许每个弧包括其指向的节点被存储在图形高速缓存或主存储器中的信息的方式生成图。 步行者可以使用该信息来确定是否访问图形缓存或主存储器中的下一个弧。

    Graph caching
    3.
    发明申请
    Graph caching 有权
    图形缓存

    公开(公告)号：US20090119279A1

    公开(公告)日：2009-05-07

    申请号：US11982391

    申请日：2007-11-01

    Applicant: Rajan Goyal ,  Muhammad Raghib Hussain ,  Trent Parker

    Inventor： Rajan Goyal ,  Muhammad Raghib Hussain ,  Trent Parker

    IPC: G06F17/30

    CPC classification number: H04L63/1408 ,  G06F9/4498 ,  G06F17/30958 ,  G06F17/30985

    Abstract: In a method and apparatus for analyzing nodes of a Deterministic Finite Automata (DFA), an accessibility ranking, based on a DFA graph geometrical configuration, may be determined in order to determine cacheable portions of the DFA graph in order to reduce the number of external memory accesses. A walker process may be configured to walk the graph in a graph cache as well as main memory. The graph may be generated in a manner allowing each arc to include information if the node it is pointing to is stored in the graph cache or in main memory. The walker may use this information to determine whether or not to access the next arc in the graph cache or in main memory.

    Abstract translation: 在用于分析确定性有限自动机（DFA）的节点的方法和装置中，可以确定基于DFA图形几何配置的可访问性排序，以便确定DFA图形的可缓存部分，以减少外部数量 内存访问 步行者进程可以被配置为在图形缓存以及主存储器中走图。 可以以允许每个弧包括其指向的节点被存储在图形高速缓存或主存储器中的信息的方式生成图。 步行者可以使用该信息来确定是否访问图形缓存或主存储器中的下一个弧。

    Graph caching
    4.
    发明授权
    Graph caching 有权

    公开(公告)号：US09787693B2

    公开(公告)日：2017-10-10

    申请号：US13311244

    申请日：2011-12-05

    Applicant: Rajan Goyal ,  Muhammad Raghib Hussain ,  Trent Parker

    Inventor： Rajan Goyal ,  Muhammad Raghib Hussain ,  Trent Parker

    IPC: G06F17/30 ,  H04L29/06 ,  G06F9/44

    CPC classification number: H04L63/1408 ,  G06F9/4498 ,  G06F17/30958 ,  G06F17/30985

    Abstract: In a method and apparatus for analyzing nodes of a Deterministic Finite Automata (DFA), an accessibility ranking, based on a DFA graph geometrical configuration, may be determined in order to determine cacheable portions of the DFA graph in order to reduce the number of external memory accesses. A walker process may be configured to walk the graph in a graph cache as well as main memory. The graph may be generated in a manner allowing each arc to include information if the node it is pointing to is stored in the graph cache or in main memory. The walker may use this information to determine whether or not to access the next arc in the graph cache or in main memory.

    Intelligent graph walking
    5.
    发明申请
    Intelligent graph walking 有权
    智能图走

    公开(公告)号：US20090119399A1

    公开(公告)日：2009-05-07

    申请号：US11982433

    申请日：2007-11-01

    Applicant: Muhammad Raghib Hussain ,  Rajan Goyal ,  Imrar Badr

    Inventor： Muhammad Raghib Hussain ,  Rajan Goyal ,  Imrar Badr

    IPC: G06F15/173

    CPC classification number: G06F17/30958 ,  H04L63/1441

    Abstract: An apparatus, and corresponding method, for performing a search for a match of at least one expression in an input stream is presented. A graph including a number of interconnected nodes is generated. A compiler may assign at least one starting node and at least one ending node. The starting node includes a location table with node position information of an ending node and a sub-string value associated with the ending node. Using the node position information and a string comparison function, intermediate nodes located between the starting and ending nodes may be bypassed. The node bypassing may reduce the number of memory accesses required to read the graph.

    Abstract translation: 呈现用于执行对输入流中的至少一个表达式的匹配的搜索的装置和相应方法。 生成包括多个互连节点的图形。 编译器可以分配至少一个起始节点和至少一个结束节点。 起始节点包括具有终止节点的节点位置信息的位置表和与结束节点相关联的子串值。 使用节点位置信息和字符串比较功能，可以绕过位于起始节点和结束节点之间的中间节点。 旁路节点可能会减少读取图形所需的存储器访问次数。

    Method and apparatus for content based searching
    7.
    发明申请
    Method and apparatus for content based searching 有权
    用于基于内容搜索的方法和装置

    公开(公告)号：US20100050177A1

    公开(公告)日：2010-02-25

    申请号：US12229617

    申请日：2008-08-25

    Applicant: Rajan Goyal ,  Muhammad Raghib Hussain

    Inventor： Rajan Goyal ,  Muhammad Raghib Hussain

    IPC: G06F9/44

    CPC classification number: G06F21/552

    Abstract: The scheduling of multiple request to be processed by a number of deterministic finite automata-based graph thread engine (DTE) workstations is processed by a novel scheduler. The scheduler may select an entry from an instruction in a content search apparatus. Using attribute information from the selected entry, the scheduler may thereafter analyze a dynamic scheduling table to obtain placement information. The scheduler may determine an assignment of the entry, using the placement information, that may limit cache thrashing and head of line blocking occurrences. Each DTE workstation may including normalization capabilities. Additionally, the content searching apparatus may employ an address memory scheme that may prevent memory bottle neck issues.

    Abstract translation: 由多个确定性有限自动机图形线程引擎（DTE）工作站处理的多个请求的调度由新的调度器处理。 调度器可以从内容搜索装置中的指令中选择一个条目。 使用来自所选条目的属性信息，调度器随后可以分析动态调度表以获得放置信息。 调度器可以使用放置信息来确定条目的分配，其可以限制高速缓存颠簸和线路阻塞发生的头部。 每个DTE工作站可以包括规范化功能。 此外，内容搜索装置可以采用可以防止存储瓶颈问题的地址存储器方案。

    Method and apparatus for content based searching
    8.
    发明授权
    Method and apparatus for content based searching 有权
    用于基于内容搜索的方法和装置

    公开(公告)号：US08176300B2

    公开(公告)日：2012-05-08

    申请号：US12229617

    申请日：2008-08-25

    Applicant: Rajan Goyal ,  Muhammad Raghib Hussain

    Inventor： Rajan Goyal ,  Muhammad Raghib Hussain

    IPC: G06F7/38 ,  G06F9/00 ,  G06F9/44 ,  G06F15/00

    CPC classification number: G06F21/552

    Abstract: The scheduling of multiple request to be processed by a number of deterministic finite automata-based graph thread engine (DTE) workstations is processed by a novel scheduler. The scheduler may select an entry from an instruction in a content search apparatus. Using attribute information from the selected entry, the scheduler may thereafter analyze a dynamic scheduling table to obtain placement information. The scheduler may determine an assignment of the entry, using the placement information, that may limit cache thrashing and head of line blocking occurrences. Each DTE workstation may including normalization capabilities. Additionally, the content searching apparatus may employ an address memory scheme that may prevent memory bottle neck issues.

    Abstract translation: 由多个确定性有限自动机图形线程引擎（DTE）工作站处理的多个请求的调度由新的调度器处理。 调度器可以从内容搜索装置中的指令中选择一个条目。 使用来自所选条目的属性信息，调度器随后可以分析动态调度表以获得放置信息。 调度器可以使用放置信息来确定条目的分配，其可以限制高速缓存颠簸和线路阻塞发生的头部。 每个DTE工作站可以包括规范化功能。 此外，内容搜索装置可以采用可以防止存储瓶颈问题的地址存储器方案。

    Intelligent graph walking
    10.
    发明授权
    Intelligent graph walking 有权
    智能图走

    公开(公告)号：US08819217B2

    公开(公告)日：2014-08-26

    申请号：US11982433

    申请日：2007-11-01

    Applicant: Muhammad Raghib Hussain ,  Rajan Goyal ,  Imrar Badr

    Inventor： Muhammad Raghib Hussain ,  Rajan Goyal ,  Imrar Badr

    IPC: G06F15/173

    CPC classification number: G06F17/30958 ,  H04L63/1441

    Abstract: An apparatus, and corresponding method, for performing a search for a match of at least one expression in an input stream is presented. A graph including a number of interconnected nodes is generated. A compiler may assign at least one starting node and at least one ending node. The starting node includes a location table with node position information of an ending node and a sub-string value associated with the ending node. Using the node position information and a string comparison function, intermediate nodes located between the starting and ending nodes may be bypassed. The node bypassing may reduce the number of memory accesses required to read the graph.

    Abstract translation: 呈现用于执行对输入流中的至少一个表达式的匹配的搜索的装置和相应方法。 生成包括多个互连节点的图形。 编译器可以分配至少一个起始节点和至少一个结束节点。 起始节点包括具有终止节点的节点位置信息的位置表和与结束节点相关联的子串值。 使用节点位置信息和字符串比较功能，可以绕过位于起始节点和结束节点之间的中间节点。 旁路节点可能会减少读取图形所需的存储器访问次数。

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