公开(公告)号：US20200328732A1

公开(公告)日：2020-10-15

申请号：US16828582

申请日：2020-03-24

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Takashi TASAKI ,  Shunya NAGATA

IPC: H03K3/037 ,  H03K19/20 ,  H03K5/14

Abstract: A semiconductor device includes: a plurality of P-channel type MOS transistors each whose source-drain path being coupled between a first wiring to which a power supply potential is to be supplied and a power supply node included in a logic circuit block, and a plurality of N-channel type MOS transistors each whose source-drain path being coupled between a ground node included in the logic circuit block and a second wiring to which a ground potential is to be supplied. Also, during standby state, each of the plurality of P-channel type MOS transistors and the plurality of N-channel type MOS transistors is diode-connected. According to the above semiconductor device, the current consumption of a logic circuit included in the logic circuit block during standby state can be reduced, and the logic circuit can be returned from standby state to normal operation state in a short time.