公开(公告)号：US20240162335A1

公开(公告)日：2024-05-16

申请号：US18452811

申请日：2023-08-21

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Ryota KURODA ,  Hitoshi MATSUURA

IPC: H01L29/739 ,  H01L29/06 ,  H01L29/66

CPC classification number: H01L29/7397 ,  H01L29/0696 ,  H01L29/66348

Abstract: A semiconductor device includes a trench formed in an element formation region of a semiconductor substrate, an insulating film formed on an inner wall of the trench, a p-type semiconductor portion embedded in a part of the trench via the insulating film, and an n-type semiconductor portion embedded in another part of the trench via the insulating film and provided so as to contact with the p-type semiconductor portion.

公开(公告)号：US20240178277A1

公开(公告)日：2024-05-30

申请号：US18523734

申请日：2023-11-29

Applicant: Renesas Electronics Corporation

Inventor： Katsumi EIKYU ,  Ryota KURODA ,  Hitoshi MATSUURA ,  Sho NAKANISHI

IPC: H01L29/08 ,  H01L21/265 ,  H01L21/266 ,  H01L29/06 ,  H01L29/417 ,  H01L29/66 ,  H01L29/739

CPC classification number: H01L29/0804 ,  H01L21/26513 ,  H01L21/266 ,  H01L29/0696 ,  H01L29/41708 ,  H01L29/66348 ,  H01L29/7397

Abstract: A semiconductor substrate includes a plurality of emitter formation regions separated from each other in a Y direction between a pair of trenches, and a separation region located between the emitter formation regions. A p-type base region is formed in the semiconductor substrate of each of the emitter formation regions and the separation region. An n-type impurity region is formed in the base region of each emitter formation region. The impurity region is also formed in the base region at a position in contact with the pair of trenches in the separation region.

公开(公告)号：US20230420550A1

公开(公告)日：2023-12-28

申请号：US18179739

申请日：2023-03-07

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Seigo NAMIOKA ,  Hitoshi MATSUURA ,  Ryota KURODA

IPC: H01L29/739 ,  H01L29/06 ,  H01L29/10 ,  H01L29/417 ,  H01L29/66

CPC classification number: H01L29/7397 ,  H01L29/0696 ,  H01L29/66348 ,  H01L29/41708 ,  H01L29/6634 ,  H01L29/1095

Abstract: A semiconductor device includes a trench emitter electrode located at a boundary between one end of an active cell region and an inactive cell region, a trench gate electrode located at a boundary between the other end of the active cell region and the inactive cell region, an end trench gate electrode connected to one end of the trench gate electrode, and an end trench emitter electrode connected to one end of the trench emitter electrode. A hole barrier region of a first conductivity type is provided under a body region of a second conductivity type between the end trench gate electrode and the end trench emitter electrode in a plan view. A body region in the active cell region and a body region in the inactive cell region are connected to each other by a body region between the end trench gate electrode and the end trench emitter electrode.

公开(公告)号：US20220165727A1

公开(公告)日：2022-05-26

申请号：US17517920

申请日：2021-11-03

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Ryota KURODA ,  Hitoshi MATSUURA

IPC: H01L27/06 ,  H01L49/02 ,  H01L29/739 ,  H01L29/66

Abstract: A built-in resistor electrically connecting a trench gate electrode and a gate pad is formed of a conductive film formed on a semiconductor substrate via an insulating film. Here, a film thickness of the insulating film is larger than a film thickness of an insulating film in a trench and is smaller than an insulating film which is a field oxide film.