公开(公告)号：US20200219982A1

公开(公告)日：2020-07-09

申请号：US16821559

申请日：2020-03-17

Applicant: RAYTHEON COMPANY

Inventor： Hooman Kazemi ,  Mark Rosker ,  Thomas E. Kazior ,  Shane A. O'Connor ,  Emily Elswick

IPC: H01L29/20 ,  H01L23/482 ,  H01L23/29 ,  H01L23/552 ,  H01L23/538

Abstract: A reconstituted wafer includes a plurality of apertures defined in a first substrate. A module is positioned in each aperture and coupled to circuit traces on the first substrate by operation of beam leads extending from the module. A second substrate is positioned over the first substrate and each module is enclosed in a space defined by the respective aperture and the second substrate. The module includes a lid and at least one mode suppression circuit disposed in the lid. The modules may include an invariant die where different technologies are stacked together.

公开(公告)号：US10930742B2

公开(公告)日：2021-02-23

申请号：US16821559

申请日：2020-03-17

Applicant: RAYTHEON COMPANY

Inventor： Hooman Kazemi ,  Mark Rosker ,  Thomas E. Kazior ,  Shane A. O'Connor ,  Emily Elswick

IPC: H01L23/482 ,  H01L23/552 ,  H01L23/538 ,  H01L29/20 ,  H01L23/29

Abstract: A reconstituted wafer includes a plurality of apertures defined in a first substrate. A module is positioned in each aperture and coupled to circuit traces on the first substrate by operation of beam leads extending from the module. A second substrate is positioned over the first substrate and each module is enclosed in a space defined by the respective aperture and the second substrate. The module includes a lid and at least one mode suppression circuit disposed in the lid. The modules may include an invariant die where different technologies are stacked together.

公开(公告)号：US20190165108A1

公开(公告)日：2019-05-30

申请号：US15827349

申请日：2017-11-30

Applicant: RAYTHEON COMPANY

Inventor： Hooman Kazemi ,  Mark Rosker ,  Thomas E. Kazior ,  Shane A. O'Connor ,  Emily Elswick

IPC: H01L29/20 ,  H01L23/482 ,  H01L23/538 ,  H01L23/552 ,  H01L23/29

Abstract: A reconstituted wafer includes a plurality of apertures defined in a first substrate. A module is positioned in each aperture and coupled to circuit traces on the first substrate by operation of beam leads extending from the module. A second substrate is positioned over the first substrate and each module is hermetically sealed in a space defined by the respective aperture and the second substrate. One or more vias are provided to access I/O signals at a surface of the first or second substrates. The modules may include an invariant die where different technologies are stacked together.