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公开(公告)号：US09467098B2
公开(公告)日：2016-10-11
申请号：US14533928
申请日：2014-11-05
Applicant: QUALCOMM Incorporated
Inventor： Xin Fan , Vijayakumar Dhanasekaran
CPC classification number: H03F1/32 , H03F1/0205 , H03F1/0266 , H03F1/086 , H03F1/3217 , H03F3/04 , H03F3/185 , H03F3/3023 , H03F2200/03 , H03F2200/18 , H03F2200/555 , H03F2201/3215 , H03F2203/30105 , H03F2203/45248
Abstract: The present disclosure amplifier circuits and methods having boosted slew rates. In one embodiment, an amplifier circuit comprises an output stage comprising a first output transistor, the first output transistor comprising a gate, a source, and a drain, wherein the gate receives a signal to be amplified. A bias circuit biases the gate of the first output transistor. A damping circuit is coupled the gate of the first output transistor and is configured to produce a high impedance at low frequencies and a low impedance at high frequencies. The damping circuit includes a current limit circuit to limit current to the gate of the first output transistor when a voltage on the gate of the first output transistor decreases in response to the signal.
Abstract translation: 本公开的放大器电路和方法具有升压转换速率。 在一个实施例中，放大器电路包括输出级，其包括第一输出晶体管，第一输出晶体管包括栅极，源极和漏极，其中栅极接收待放大的信号。 偏置电路偏置第一输出晶体管的栅极。 阻尼电路耦合第一输出晶体管的栅极，并被配置为在低频下产生高阻抗，在高频下产生低阻抗。 当第一输出晶体管的栅极上的电压响应于该信号而减小时，阻尼电路包括电流限制电路，以限制到第一输出晶体管的栅极的电流。
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公开(公告)号：US11695865B2
公开(公告)日：2023-07-04
申请号：US17813141
申请日：2022-07-18
Applicant: QUALCOMM Incorporated
Inventor： Sandeep Louis D'Souza , Vadim Winebrand , Mohamed Ahmed , Syed Fawad Ahmad , Nathan Felix Altman , Suhail Jalil , Livingstone Song , Raj Kumar , David Chandler , Masoud Roham , Xin Fan , Lennart Karl-Axel Mathe , Kostadin Dimitrov Djordjev , Deep Bhatia
IPC: H04M1/72448
CPC classification number: H04M1/72448 , H04M2250/12
Abstract: Various aspects of the present disclosure generally relate to control of a user device under a wet condition. In some aspects, a user device may determine whether the user device is operating under a wet condition; select, based at least in part on whether the user device is operating under the wet condition, a set of input components to control the user device, wherein the set of input components is selected from a plurality of different sets of input components; and configure a user interface of the user device according to the set of input components. Numerous other aspects are provided.
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公开(公告)号：US11374542B2
公开(公告)日：2022-06-28
申请号：US16799415
申请日：2020-02-24
Applicant: QUALCOMM Incorporated
Inventor： Khaled Mahmoud Abdelfattah Aly , Sherif Galal , Xin Fan
Abstract: Certain aspects of the present disclosure are generally directed to circuitry and techniques for current sensing. For example, certain aspects provide a circuit for signal amplification including a first amplifier, a second amplifier, and a third amplifier. The circuit also includes a first capacitive element coupled between a first output of the first amplifier and a first input of the third amplifier, a second capacitive element coupled between a second output of the first amplifier and a second input of the third amplifier, a third capacitive element coupled between a first output of the second amplifier and the first input of the third amplifier, and a fourth capacitive element coupled between a second output of the second amplifier and the second input of the third amplifier.
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公开(公告)号：US20150381120A1
公开(公告)日：2015-12-31
申请号：US14533928
申请日：2014-11-05
Applicant: QUALCOMM Incorporated
Inventor： Xin Fan , Vijayakumar Dhanasekaran
CPC classification number: H03F1/32 , H03F1/0205 , H03F1/0266 , H03F1/086 , H03F1/3217 , H03F3/04 , H03F3/185 , H03F3/3023 , H03F2200/03 , H03F2200/18 , H03F2200/555 , H03F2201/3215 , H03F2203/30105 , H03F2203/45248
Abstract: The present disclosure amplifier circuits and methods having boosted slew rates. In one embodiment, an amplifier circuit comprises an output stage comprising a first output transistor, the first output transistor comprising a gate, a source, and a drain, wherein the gate receives a signal to be amplified. A bias circuit biases the gate of the first output transistor. A damping circuit is coupled the gate of the first output transistor and is configured to produce a high impedance at low frequencies and a low impedance at high frequencies. The damping circuit includes a current limit circuit to limit current to the gate of the first output transistor when a voltage on the gate of the first output transistor decreases in response to the signal.
Abstract translation: 本公开的放大器电路和方法具有升压转换速率。 在一个实施例中，放大器电路包括输出级，其包括第一输出晶体管，第一输出晶体管包括栅极，源极和漏极，其中栅极接收待放大的信号。 偏置电路偏置第一输出晶体管的栅极。 阻尼电路耦合第一输出晶体管的栅极，并被配置为在低频下产生高阻抗，在高频下产生低阻抗。 当第一输出晶体管的栅极上的电压响应于该信号而减小时，阻尼电路包括电流限制电路，以限制到第一输出晶体管的栅极的电流。
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