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公开(公告)号：US09898029B2
公开(公告)日：2018-02-20
申请号：US14970265
申请日：2015-12-15
Applicant: QUALCOMM Incorporated
Inventor： Todd Morgan Rasmus
CPC classification number: G05F3/262 , G05F3/225 , G05F3/24 , G05F3/242 , G05F3/245 , G05F3/267 , G05F3/30
Abstract: An apparatus and method for generating a temperature-compensated reference voltage are disclosed. The apparatus generates substantially equal temperature-compensated currents by controlling (through negative feedback) voltages across separate resistors through which the currents flow, respectively. Two of the temperature-compensated currents are formed by combining (e.g., summing) a complementary to absolute temperature (CTAT) current (ICTAT) and a proportional to absolute temperature (PTAT) current (IPTAT). A reference voltage VREF is produced by configuring the other the temperature-compensated current to flow through an output resistor.
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2.发明授权公开(公告)号：US11838000B2
公开(公告)日：2023-12-05
申请号：US17453967
申请日：2021-11-08
Applicant: QUALCOMM Incorporated
Inventor： Todd Morgan Rasmus , Shih-Wei Chou
CPC classification number: H03F3/45183 , H03F1/0227 , H03F2200/453 , H03F2200/456 , H03F2200/555 , H03F2200/91 , H03F2203/45008
Abstract: Aspects of the present disclosure provide a method for regulating an integration current of a sensing amplifier. The sensing amplifier includes a first input transistor and a second input transistor, wherein a source of the first input transistor and a source of the second input transistor are coupled to a source node. The method includes pulling a current from or sourcing the current to the source node, measuring the integration current, comparing the measured integration current with a reference signal, and adjusting the current pulled from or sourced to the source node based on the comparison.
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3.发明申请公开(公告)号：US20190081604A1
公开(公告)日：2019-03-14
申请号：US15701072
申请日：2017-09-11
Applicant: QUALCOMM Incorporated
Inventor： Pradeep Thiagarajan , Xiaobin Yuan , Todd Morgan Rasmus
Abstract: A differential signal processing circuit includes a local common mode voltage control circuit for controlling a common mode voltage of an output differential signal generated by the differential signal processing circuit based on an external common mode control current generated by an external common mode voltage control circuit. The differential signal processing circuit, which may be configured as a variable gain amplifier (VGA) or a continuous time linear equalizer (CTLE), includes a pair of load devices, a pair of input transistors, and a pair of current source transistors coupled via separate paths between upper and lower voltage rails. The external control circuit includes a replica circuit including a replica load device, a replica input transistor, and a replica current source transistor. The external control circuit sets the replica common mode voltage to a target using a current, wherein the external common mode control current is based on that current.
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公开(公告)号：US11374560B1
公开(公告)日：2022-06-28
申请号：US17321005
申请日：2021-05-14
Applicant: QUALCOMM Incorporated
Inventor： Todd Morgan Rasmus
Abstract: A regeneration circuit includes a first inverting circuit having an input and an output, a second inverting circuit having an input and an output, a first transistor coupled to the input of the second inverting circuit, wherein a gate of the first transistor is configured to receive a first input signal, and a second transistor coupled to the input of the first inverting circuit, wherein a gate of the second transistor is configured to receive a second input signal. The regeneration circuit also includes a first switch coupled between the first transistor and the output of the first inverting circuit, wherein a control input of the first switch is configured to receive a timing signal, and a second switch coupled between the second transistor and the output of the second inverting circuit, wherein a control input of the second switch is configured to receive the timing signal.
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公开(公告)号：US20190173440A1
公开(公告)日：2019-06-06
申请号：US15829774
申请日：2017-12-01
Applicant: QUALCOMM Incorporated
Inventor： Todd Morgan Rasmus , Minhan Chen
IPC: H03F3/45
Abstract: A resistor in a pair of resistors is selectively coupled to a current source through a selection switch during the reset phase of a voltage-mode sense amplifier so that one evaluation node for the voltage-mode sense amplifier is discharged from a power supply voltage by an ohmic voltage drop across the selectively-coupled resistor to null an offset for the voltage-mode sense amplifier.
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Patent Agency Ranking
公开(公告)号：US10069411B2
公开(公告)日：2018-09-04
申请号：US15689612
申请日：2017-08-29
Applicant: QUALCOMM Incorporated
Inventor： Anirban Banerjee , Todd Morgan Rasmus
Abstract: One aspect relates to a method for operating a charge pump including comparing a drain voltage of a current sink transistor of the charge pump with a drain voltage of a current reference transistor, adjusting a gate bias voltage of the current sink transistor and the current reference transistor using a first error amplifier in a direction that reduces a difference between the drain voltage of the current sink transistor and the drain voltage of the current reference transistor, comparing a common-mode voltage of a loop filter with a reference voltage, and adjusting a gate bias voltage of a current source transistor of the charge pump using a second error amplifier in a direction that reduces a difference between the common-mode voltage of the loop filter and the reference voltage, wherein the first error amplifier includes a larger number of amplifying stages than the second error amplifier.
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公开(公告)号：US10211782B1
公开(公告)日：2019-02-19
申请号：US15785294
申请日：2017-10-16
Applicant: QUALCOMM Incorporated
Inventor： Anirban Banerjee , Todd Morgan Rasmus
Abstract: A rail-to-rail sense amplifier includes a PMOS differential pair and an NMOS differential pair that are arranged in parallel with regard to a biasing network for driving a class AB output stage. The sense amplifier includes a first current differential amplifier and a second current differential amplifier for increasing the output swing while reducing power consumption.
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公开(公告)号：US10135644B1
公开(公告)日：2018-11-20
申请号：US15691817
申请日：2017-08-31
Applicant: QUALCOMM Incorporated
Inventor： Todd Morgan Rasmus , Joseph Natonio
IPC: H04L25/03
Abstract: A low power 1-tap decision feedback equalizer (DFE) is disclosed. The DFE can include a plurality of AC-coupling networks, each having an input coupled to an output of a continuous time linear equalizer (CTLE) within an active stage of a receiver to receive a corresponding pair of differential signals of data, and an output coupled to a respective one of a plurality of data samplers to present a high frequency component of the corresponding pair of differential signals to the respective data sampler. The DFE can further include a plurality of transport paths, each transport path coupled to a respective AC-coupling network to receive the corresponding pair of differential signals. Each transport path can include one of the data sampler and an injection element to passively inject an offset into the high frequency component at an input of the respective data sampler.
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公开(公告)号：US20180115239A1
公开(公告)日：2018-04-26
申请号：US15689612
申请日：2017-08-29
Applicant: QUALCOMM Incorporated
Inventor： Anirban Banerjee , Todd Morgan Rasmus
CPC classification number: H02M3/07 , G06F1/04 , H03L7/0891 , H03L7/0895 , H03L7/0896 , H03L7/093 , H03L7/099 , H03L2207/06
Abstract: One aspect relates to a method for operating a charge pump including comparing a drain voltage of a current sink transistor of the charge pump with a drain voltage of a current reference transistor, adjusting a gate bias voltage of the current sink transistor and the current reference transistor using a first error amplifier in a direction that reduces a difference between the drain voltage of the current sink transistor and the drain voltage of the current reference transistor, comparing a common-mode voltage of a loop filter with a reference voltage, and adjusting a gate bias voltage of a current source transistor of the charge pump using a second error amplifier in a direction that reduces a difference between the common-mode voltage of the loop filter and the reference voltage, wherein the first error amplifier includes a larger number of amplifying stages than the second error amplifier.
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公开(公告)号：US09768684B1
公开(公告)日：2017-09-19
申请号：US15334958
申请日：2016-10-26
Applicant: QUALCOMM Incorporated
Inventor： Anirban Banerjee , Todd Morgan Rasmus
CPC classification number: H02M3/07 , G06F1/04 , H03L7/0891 , H03L7/0895 , H03L7/0896 , H03L7/093 , H03L7/099 , H03L2207/06
Abstract: One aspect of the present disclosure relates to a method for operating a charge pump. The method includes comparing a drain voltage of a current sink transistor of the charge pump with a drain voltage of a current reference transistor, and adjusting a gate bias voltage of the current sink transistor and the current reference transistor in a direction that reduces a difference between the drain voltage of the current sink transistor and the drain voltage of the current reference transistor. The method also includes comparing a common-mode voltage of a loop filter with a reference voltage, and adjusting a gate bias voltage of a current source transistor of the charge pump in a direction that reduces a difference between the common-mode voltage of the loop filter and the reference voltage.
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