公开(公告)号：US09384825B2

公开(公告)日：2016-07-05

申请号：US14499041

申请日：2014-09-26

Applicant: QUALCOMM Incorporated

Inventor： Jentsung Lin ,  Paul Bassett ,  Suresh Venkumahanti

IPC: G11C11/00 ,  G11C11/419 ,  G11C11/412 ,  G11C8/08

CPC classification number: G11C11/419 ,  G11C8/08 ,  G11C8/16 ,  G11C11/412

Abstract: A multi-port hybrid full-swing/low-swing memory circuit in a static random access memory (SRAM) device comprises a first wordline driver that comprises a read wordline driver, a second wordline driver that comprises either a read wordline driver or a read/write wordline driver, a memory cell coupled to the first and second wordline drivers, a sense amplifier coupled to the memory cell, and a latch coupled to the memory cell. The memory circuit is capable of achieving high-speed low-swing or low-speed full-swing operations while avoiding the need for a large circuit area on an integrated circuit.

Abstract translation: 静态随机存取存储器（SRAM）装置中的多端口混合全摆幅/低摆频存储器电路包括第一字线驱动器，其包括读字线驱动器，第二字线驱动器，其包括读字线驱动器或读 写入字线驱动器，耦合到第一和第二字线驱动器的存储单元，耦合到存储器单元的读出放大器和耦合到存储器单元的锁存器。 存储电路能够实现高速低摆幅或低速全摆动操作，同时避免了集成电路上的大电路面积的需要。