公开(公告)号：US09413344B2

公开(公告)日：2016-08-09

申请号：US14668041

申请日：2015-03-25

Applicant: QUALCOMM Incorporated

Inventor： Keith Alan Bowman ,  Jeffrey Todd Bridges ,  Sarthak Raina ,  Yeshwant Nagaraj Kolla ,  Jihoon Jeong ,  Francois Ibrahim Atallah ,  William Robert Flederbach ,  Jeffrey Herbert Fischer

IPC: H03H11/26 ,  H03K5/13 ,  G06F1/10 ,  H03K5/156 ,  H03K5/134 ,  H03K5/00

CPC classification number: H03K5/13 ,  G06F1/10 ,  H03K5/134 ,  H03K5/156 ,  H03K2005/00019

Abstract: Automatic calibration circuits for operational calibration of critical-path time delays in adaptive clock distribution systems, and related methods and systems, are disclosed. The adaptive clock distribution system includes a tunable-length delay circuit to delay distribution of a clock signal provided to a clocked circuit, to prevent timing margin degradation of the clocked circuit after a voltage droop occurs in a power supply supplying power to the clocked circuit. The adaptive clock distribution system also includes a dynamic variation monitor to reduce frequency of the delayed clock signal provided to the clocked circuit in response to the voltage droop in the power supply, so that the clocked circuit is not clocked beyond its performance limits during a voltage droop. An automatic calibration circuit is provided in the adaptive clock distribution system to calibrate the dynamic variation monitor during operation based on operational conditions and environmental conditions of the clocked circuit.

Abstract translation: 公开了用于自适应时钟分配系统中关键路径时间延迟的操作校准的自动校准电路以及相关方法和系统。 自适应时钟分配系统包括可延长延迟电路，用于延迟提供给时钟电路的时钟信号的分布，以防止在向时钟控制电路供电的电源中发生电压下降之后时钟电路的时序裕度下降。 自适应时钟分配系统还包括动态变化监视器，以响应于电源中的电压下降来减小提供给时钟电路的延迟时钟信号的频率，使得时钟控制的电路在电压期间不超过其性能限制 下垂 在自适应时钟分配系统中提供自动校准电路，以在操作期间基于时钟电路的操作条件和环境条件校准动态变化监视器。