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公开(公告)号:US20160370699A1
公开(公告)日:2016-12-22
申请号:US15182510
申请日:2016-06-14
Applicant: QUALCOMM Incorporated
Inventor: Xiangdong CHEN , Hyeokjin Bruce LIM , Ohsang KWON , Mickael MALABRY , Jingwei ZHANG , Raymond George STEPHANY , Haining YANG , Kern RIM , Stanley Seungchul SONG , Mukul GUPTA , Foua VANG
CPC classification number: G03F1/70 , G03F7/70433 , G03F7/70466 , G06F17/5068
Abstract: In an aspect of the disclosure, a method, a computer-readable medium, and an apparatus for assigning feature colors for a multiple patterning process are provided. The apparatus receives integrated circuit layout information including a set of features and an assigned color of a plurality of colors for each feature of a first subset of features of the set of features. In addition, the apparatus performs color decomposition on a second subset of features to assign colors to features in the second subset of features. The second subset of features includes features in the set of features that are not included in the first subset of features with an assigned color.
Abstract translation: 在本公开的一个方面,提供了一种方法,计算机可读介质和用于分配多个图案化处理的特征颜色的装置。 该装置接收集成电路布局信息,该信息包括一组特征的集合,以及针对特征集合的第一特征集的每个特征的多种颜色的分配颜色。 另外,该装置对特征的第二子集执行颜色分解,以将颜色分配给第二特征子集中的特征。 特征的第二子集包括不包括在具有分配颜色的特征的第一子集中的特征集合中的特征。
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公开(公告)号:US20150235948A1
公开(公告)日:2015-08-20
申请号:US14274184
申请日:2014-05-09
Applicant: QUALCOMM Incorporated
Inventor: Stanley Seungchul SONG , Zhongze WANG , Ohsang KWON , Kern RIM , John Jianhong ZHU , Xiangdong CHEN , Foua VANG , Raymond George STEPHANY , Choh Fei YEAP
IPC: H01L23/528 , H01L27/088 , H01L21/768 , H01L23/522
CPC classification number: H01L23/5283 , H01L21/76831 , H01L21/76877 , H01L21/76895 , H01L21/76897 , H01L23/485 , H01L23/5226 , H01L27/088 , H01L29/41775 , H01L29/42312 , H01L2027/11866 , H01L2924/0002 , H01L2924/00
Abstract: A semiconductor device includes a gate and a first active contact adjacent to the gate. Such a device further includes a first stacked contact electrically coupled to the first active contact, including a first isolation layer on sidewalls electrically isolating the first stacked contact from the gate. The device also includes a first via electrically coupled to the gate and landing on the first stacked contact. The first via electrically couples the first stacked contact and the first active contact to the gate to ground the gate.
Abstract translation: 半导体器件包括栅极和邻近栅极的第一有源触点。 这种器件还包括电耦合到第一有源触点的第一堆叠触点,包括在侧壁上电隔离第一堆叠触头与栅极的第一隔离层。 该装置还包括电连接到门的第一通孔和第一堆叠接触件上的着陆。 第一通孔将第一堆叠触点和第一有源触点电耦合到栅极以将栅极接地。
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