-
1.
公开(公告)号:US11244895B2
公开(公告)日:2022-02-08
申请号:US16889645
申请日:2020-06-01
Applicant: QUALCOMM Incorporated
Inventor: Ramesh Manchana , Sudheer Chowdary Gali , Biswa Ranjan Panda , Dhaval Sejpal , Stanley Seungchul Song
IPC: H01L23/522 , H01L23/528 , H01L27/06 , H01L29/78 , H01L29/06 , H01L29/10 , H01L49/02
Abstract: A substrate tie cell on an IC is provided. The substrate tie cell includes a diffusion region. The diffusion region is a p-type diffusion region on or within a p-type substrate, an n-type diffusion region on or within an n-type well within a p-type substrate, an n-type diffusion region on or within an n-type substrate, or a p-type diffusion region on or within a p-type well within an n-type substrate. The substrate tie cell further includes a plurality of adjacent gate interconnects (n adjacent gate interconnects) extending over the diffusion region, where n≥4. The diffusion region is configured to be at one of a first voltage or a second voltage, and the gate interconnects are configured to be at an other of the first voltage or the second voltage. In one configuration, the first voltage is a power supply voltage and the second voltage is a ground voltage.