公开(公告)号：US11914524B2

公开(公告)日：2024-02-27

申请号：US17684231

申请日：2022-03-01

Applicant: QUALCOMM Incorporated

Inventor： Adrian Montero ,  Huzefa Sanjeliwala ,  Paul Kitchin ,  Prarthna Santhanakrishnan ,  Conrado Blasco ,  Pradeep Kanapathipillai

IPC: G06F12/1036 ,  G06F9/30 ,  G06F9/455

CPC classification number: G06F12/1036 ,  G06F9/30043 ,  G06F9/30047 ,  G06F9/30087 ,  G06F9/45558 ,  G06F2009/45562

Abstract: An electronic device includes one or more processors for executing one or more virtual machines. In response to a request for initiating a synchronization event, a processor identifies a subset of speculative memory access requests in one or more memory access request queues. Automatically and in accordance with the identifying, the processor purges translations associated with the subset of speculative memory access requests. Subsequent to the purging, the processor initiates the synchronization event. In some implementations, memory access completion is forced in response to a context synchronization event that corresponds to a termination of a first application, a termination of a first virtual machine, or a system call for updating a system register. Alternatively, in some implementations, memory access completion is forced in an operating system level or an application level in response to a data synchronization event that is initiated on a hypervisor layer or a firmware layer.