System and method of sending data via additional secondary data lines on a bus

    公开(公告)号:US09904652B2

    公开(公告)日:2018-02-27

    申请号:US14535992

    申请日:2014-11-07

    Abstract: A serial low-power inter-chip media bus communications link is deployed in apparatus having multiple Integrated Circuit devices. Communications capabilities of a device coupled to the communications link may be determined and configuration or framing message may be sent to the first device based on the capabilities. The messages may be transmitted on a primary data line of the communications link with a clock used to control timing of transmission on at least the primary data line. The communications capabilities can include information identifying a number of data wires supported by or coupled to the device. A first device may be configured to communicate with a second device over a secondary data line, which may be reserved for such direct communication. Communications on the secondary data line may be synchronized using the clock signal and may be controlled by a different protocol than the protocol used for the primary data line.

    SYSTEM AND METHOD OF SENDING DATA VIA ADDITIONAL SECONDARY DATA LINES ON A BUS
    2.
    发明申请
    SYSTEM AND METHOD OF SENDING DATA VIA ADDITIONAL SECONDARY DATA LINES ON A BUS 有权
    通过总线上的附加二级数据线发送数据的系统和方法

    公开(公告)号:US20150134862A1

    公开(公告)日:2015-05-14

    申请号:US14535992

    申请日:2014-11-07

    Abstract: A serial low-power inter-chip media bus communications link is deployed in apparatus having multiple Integrated Circuit devices. Communications capabilities of a device coupled to the communications link may be determined and configuration or framing message may be sent to the first device based on the capabilities. The messages may be transmitted on a primary data line of the communications link with a clock used to control timing of transmission on at least the primary data line. The communications capabilities can include information identifying a number of data wires supported by or coupled to the device. A first device may be configured to communicate with a second device over a secondary data line, which may be reserved for such direct communication. Communications on the secondary data line may be synchronized using the clock signal and may be controlled by a different protocol than the protocol used for the primary data line.

    Abstract translation: 串行低功率芯片间媒体总线通信链路部署在具有多个集成电路设备的设备中。 可以确定耦合到通信链路的设备的通信能力,并且可以基于能力将配置或成帧消息发送到第一设备。 消息可以在具有用于控制至少主数据线上的传输定时的时钟的通信链路的主数据线上发送。 通信能力可以包括识别由设备支持或耦合到设备的多个数据线的信息。 第一设备可以被配置为通过辅助数据线与第二设备进行通信,次级数据线可以被保留用于这种直接通信。 次数据线上的通信可以使用时钟信号同步,并且可以由与用于主数据线的协议不同的协议来控制。

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