公开(公告)号：US20210210452A1

公开(公告)日：2021-07-08

申请号：US16987122

申请日：2020-08-06

Applicant: QUALCOMM Incorporated

Inventor： Abdolreza LANGARI ,  Periannan CHIDAMBARAM ,  Lisha ZHANG ,  Jonghae KIM

IPC: H01L23/00 ,  H01L23/538 ,  H01L23/28 ,  H01L23/488

Abstract: A device that includes an integrated device, a plurality of solder interconnects, and an integrated passive device (IPD). The integrated device includes a die having a front side and back side, and a metallization portion coupled to the front side of the die. The metallization portion includes at least one metallization layer and a plurality of under bump metallization (UBM) interconnects. The plurality of solder interconnects is coupled to the metallization portion. The integrated passive device (IPD) is coupled to the metallization portion of the integrated device such that the IPD is located between at least two solder interconnects from the plurality of solder interconnects.

公开(公告)号：US20230036650A1

公开(公告)日：2023-02-02

申请号：US17386278

申请日：2021-07-27

Applicant: QUALCOMM Incorporated

Inventor： Yuan LI ,  Aniket PATIL ,  Hong Bok WE ,  Abdolreza LANGARI ,  Lisha ZHANG

IPC: H01L23/60 ,  H01L21/50 ,  H01L23/522

Abstract: In an aspect, a semiconductor includes a substrate. The substrate includes a column comprising a conductive paste that passes through a plurality of metal layers, a resin sheath surrounding the column, a ground shield surrounding the resin sheath, and a plurality of sense lines. The plurality of sense lines include a first sense line that is connected to the column comprising the conductive paste and a second sense line that is connected to the ground shield. The resin comprises a dielectric material.