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公开(公告)号:US20200310740A1
公开(公告)日:2020-10-01
申请号:US16833346
申请日:2020-03-27
Applicant: QUALCOMM Incorporated
Inventor: Khaled Mahmoud ABDELFATTAH ALY , David Ta-hsiang LIN
Abstract: An audio codec system includes an audio driver path coupled to a first node of the audio codec system. A first terminal of a sense resistor external to the audio codec system is coupled to the first node and a second terminal of the sense resistor is coupled to an auxiliary device load. The audio codec system includes a second path having a first bias circuit, a second bias circuit and an off-chip voltage reference. The first bias circuit is coupled to a second node of the audio codec system. The second bias circuit is coupled to a third node of the audio codec system. The off-chip voltage reference is associated with the auxiliary device load coupled between the first bias circuit and the second bias circuit.
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公开(公告)号:US20240179465A1
公开(公告)日:2024-05-30
申请号:US18060279
申请日:2022-11-30
Applicant: QUALCOMM Incorporated
CPC classification number: H04R5/04 , H03F1/3205 , H03F3/185 , H04R2420/07 , H04R2420/09
Abstract: A wireless device may include a plug that is shared by high speed data, analog audio signals, and power. Switches may be included on wires between the plug and the circuits that provide the high-speed data, analog audio signals and power to isolate those circuits from overvoltage conditions. Linearizer circuits may be included to provide gate driving signals to the switches, e.g., during transmission of analog audio signals. The linearizer circuits may include digital-to-analog converters to apply a gain factor to analog audio signals.
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公开(公告)号:US20240176574A1
公开(公告)日:2024-05-30
申请号:US18072603
申请日:2022-11-30
Applicant: QUALCOMM Incorporated
Inventor: Dongyang TANG , Ramkumar SIVAKUMAR , Khaled Mahmoud ABDELFATTAH ALY
IPC: G06F3/16 , G06F13/38 , H03K17/687
CPC classification number: G06F3/162 , G06F13/38 , H03K17/6871 , G06F2213/0042
Abstract: An integrated circuit is provided with a terminal that functions to pass a data signal during a high-speed data mode of operation and to pass an audio signal during an audio mode of operation. The integrated circuit includes an audio source that couples to the terminal through an audio pass transistor during the audio mode of operation. To maintain the audio pass transistor off during the high-speed data mode of operation, the integrated circuit includes a first transistor coupled between the terminal and a gate of the audio pass transistor. The first transistor conducts negative charge from the terminal to the gate of the audio pass transistor.
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公开(公告)号:US20240178663A1
公开(公告)日:2024-05-30
申请号:US18070414
申请日:2022-11-28
Applicant: QUALCOMM Incorporated
Inventor: Kshitij YADAV , Vijayakumar DHANASEKARAN , Khaled Mahmoud ABDELFATTAH ALY , Ramkumar SIVAKUMAR , Dongyang TANG , Chienchung YANG
IPC: H02H9/04
CPC classification number: H02H9/046
Abstract: An ESD trigger circuit is provided for protecting a pass transistor coupled to an integrated circuit terminal. The integrated circuit terminal couples through a diode to a voltage node. In response to an electrostatic shock at the integrated circuit terminal, the diode conducts charge to the voltage node to pulse a voltage of the voltage node. The ESD trigger circuit responds to the pulse of the voltage by coupling the voltage node to a gate of the pass transistor.
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公开(公告)号:US20210281202A1
公开(公告)日:2021-09-09
申请号:US16808885
申请日:2020-03-04
Applicant: QUALCOMM Incorporated
Inventor: Khaled Mahmoud ABDELFATTAH ALY
IPC: H02P25/034 , G06F3/01
Abstract: Certain aspects of the present disclosure generally relate to methods and apparatus for driving haptic actuators. An example actuator driver circuit generally includes a driver and calibration circuitry. The driver has at least one output for coupling to at least one input of an actuator. The calibration circuitry is configured to: detect a phase of a voltage signal at the at least one output of the driver, detect a phase of a current signal at the at least one output of the driver, determine a phase difference between the phase of the voltage signal and the phase of the current signal, and adjust a frequency of an oscillating signal for the driver, based at least in part on the phase difference.
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公开(公告)号:US20220302884A1
公开(公告)日:2022-09-22
申请号:US17805307
申请日:2022-06-03
Applicant: QUALCOMM Incorporated
Inventor: Khaled Mahmoud ABDELFATTAH ALY , Sherif GALAL , Xin FAN
Abstract: Certain aspects of the present disclosure are generally directed to circuitry and techniques for current sensing. For example, certain aspects provide a circuit for signal amplification including a first amplifier, a second amplifier, and a third amplifier. The circuit also includes a first capacitive element coupled between a first output of the first amplifier and a first input of the third amplifier, a second capacitive element coupled between a second output of the first amplifier and a second input of the third amplifier, a third capacitive element coupled between a first output of the second amplifier and the first input of the third amplifier, and a fourth capacitive element coupled between a second output of the second amplifier and the second input of the third amplifier.
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公开(公告)号:US20210265958A1
公开(公告)日:2021-08-26
申请号:US16799415
申请日:2020-02-24
Applicant: QUALCOMM Incorporated
Inventor: Khaled Mahmoud ABDELFATTAH ALY , Sherif GALAL , Xin FAN
Abstract: Certain aspects of the present disclosure are generally directed to circuitry and techniques for current sensing. For example, certain aspects provide a circuit for signal amplification including a first amplifier, a second amplifier, and a third amplifier. The circuit also includes a first capacitive element coupled between a first output of the first amplifier and a first input of the third amplifier, a second capacitive element coupled between a second output of the first amplifier and a second input of the third amplifier, a third capacitive element coupled between a first output of the second amplifier and the first input of the third amplifier, and a fourth capacitive element coupled between a second output of the second amplifier and the second input of the third amplifier.
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公开(公告)号:US20240178662A1
公开(公告)日:2024-05-30
申请号:US18070386
申请日:2022-11-28
Applicant: QUALCOMM Incorporated
Inventor: Kshitij YADAV , Vijayakumar DHANASEKARAN , Khaled Mahmoud ABDELFATTAH ALY , Ramkumar SIVAKUMAR
IPC: H02H9/04
CPC classification number: H02H9/046
Abstract: A differential ESD circuit is provided for protecting a pair of differential terminals of an integrated circuit from electrostatic shock. A first diode couples between a first terminal in the pair of differential terminals and a first resistor that couples to a voltage node of the integrated circuit. Similarly, a second diode couples between a second terminal in the pair of differential terminals and a second resistor that couples to the voltage node of the integrated circuit. The first and second resistors isolate the first and second terminals from a capacitive loading that would otherwise exist from the first and second diodes.
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公开(公告)号:US20240162874A1
公开(公告)日:2024-05-16
申请号:US18055996
申请日:2022-11-16
Applicant: QUALCOMM Incorporated
Inventor: Dongyang TANG , Ramkumar SIVAKUMAR , Khaled Mahmoud ABDELFATTAH ALY , Vijayakumar DHANASEKARAN
CPC classification number: H03G5/165 , G06F3/162 , H03F3/183 , H04R3/00 , H04S1/00 , H03F2200/03 , H04R2420/07 , H04R2420/09
Abstract: A transmission line includes an equalization circuit. The equalization circuit is a second-order equalization circuit having a first loop at a gain element and a second loop at the gain element. The first loop may include a first compensation capacitor, and the second loop may include a second compensation capacitor and a resistor. The second order equalization circuit may allow for improved performance with respect to gain as well as reduced power usage.
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公开(公告)号:US20240162718A1
公开(公告)日:2024-05-16
申请号:US18055306
申请日:2022-11-14
Applicant: QUALCOMM Incorporated
Inventor: Vijayakumar DHANASEKARAN , Ramkumar SIVAKUMAR , Kshitij YADAV , Khaled Mahmoud ABDELFATTAH ALY
IPC: H02J7/00
CPC classification number: H02J7/00034 , H02J7/00308
Abstract: Circuits and methods for suppression of negative transient voltage may be implemented in systems that combine high-speed data, audio, and charging at a plug. The circuits and methods for suppression of the negative transient voltage may include a first diode and transistor coupled in series between a pin and ground, where the transistor is controlled by an output of a voltage comparator that is also coupled to the first pin. A negative transient voltage event may cause the comparator to activate the transistor to sink a current through the diode.
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