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公开(公告)号:US10382190B1
公开(公告)日:2019-08-13
申请号:US16035575
申请日:2018-07-13
Applicant: QUALCOMM Incorporated
Inventor: Rajeev Sharma , Santhosh Kumar Gude , Parth Patel , Hadi Goudarzi , Eskinder Hailu
IPC: H04L7/00 , H04L7/033 , G06F1/26 , G06F13/362
Abstract: A desirable feature of a SERDES design is power savings. One way to achieve power savings is by keeping the CDR circuit OFF during most of the time when a link is active between a transmitter and a receiver. However, due to voltage supply noise, temperature fluctuations and uncorrelated crosstalk, the receiver data may shift and/or the eye may collapse if the CDR is not turned ON to take care of these modulations. To address such disadvantages, it is proposed to generate a CDR profile that can specify optimum CDR ON and OFF time so that link stability may be maintained while saving power.
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公开(公告)号:US09356614B1
公开(公告)日:2016-05-31
申请号:US14604616
申请日:2015-01-23
Applicant: QUALCOMM Incorporated
Inventor: Behnam Amelifard , Hadi Goudarzi , Chia Heng Chang
CPC classification number: H03M1/1009 , G11C19/28 , H03M1/002 , H03M7/165 , H03M7/6047
Abstract: A code converter is provided. The code converter includes a plurality of serial shift registers arranged to convert an input to a thermometer output. The code converter further includes a plurality of clock control circuits each configured to provide a clock to a corresponding one of the shift registers. A method of generating a signal in thermometer code is provided. The method includes enabling a subset of a plurality of shift registers and converting an input to a thermometer output by the plurality of shift registers. Another code converter is further provided. The code converter includes means for converting an input to a thermometer output. The means for converting includes a plurality of shift registers. The code converter further includes means for enabling a subset of the shift registers.
Abstract translation: 提供代码转换器。 代码转换器包括多个串行移位寄存器,用于将输入转换为温度计输出。 代码转换器还包括多个时钟控制电路,每个时钟控制电路被配置为向对应的一个移位寄存器提供时钟。 提供了一种以温度计代码生成信号的方法。 该方法包括启用多个移位寄存器的子集,并将输入转换为多个移位寄存器的温度计输出。 还提供另一代码转换器。 代码转换器包括用于将输入转换为温度计输出的装置。 用于转换的装置包括多个移位寄存器。 代码转换器还包括用于启用移位寄存器的子集的装置。
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公开(公告)号:US11115176B1
公开(公告)日:2021-09-07
申请号:US16809477
申请日:2020-03-04
Applicant: QUALCOMM INCORPORATED
Inventor: Hadi Goudarzi , Chia Heng Chang
IPC: H04L7/00 , G06F13/42 , G06F1/3234
Abstract: Clock-data timing in a multi-lane serial data communication link may be adjusted to compensate for drift. A reference lane may be selected and periodically trained to adjust clock-data timing. In response to initiation of a first lane transitioning from an active state to an inactive state, first information representing the clock-data timing of the reference lane at the time that transition is initiated may be determined. Then, in response to initiation of the first lane transitioning back from the inactive state to the active state, second information representing the clock-data timing of the reference lane at the time that transition is initiated may be determined. The clock-data timing of the first lane may be adjusted based on the first information and the second information.
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公开(公告)号:US10965442B2
公开(公告)日:2021-03-30
申请号:US16150123
申请日:2018-10-02
Applicant: QUALCOMM Incorporated
Inventor: Eskinder Hailu , Bupesh Pandita , Jon Boyette , Hadi Goudarzi , Yong Suk Jun , Zhi Zhu , Minhan Chen
Abstract: A receiver is provided that includes a time-to-digital converter for converting a phase difference between a clock signal and a received data signal into a phase-difference digital code. The receiver also includes a logic circuit that controls a programmable delay line to delay the clock signal into a delayed clock signal by a delay that is responsive to a difference between the phase-difference code and a unit interval for the clock signal. The delayed clock signal clocks a flip-flop to register the received data signal.
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