公开(公告)号：US10579516B2

公开(公告)日：2020-03-03

申请号：US15457899

申请日：2017-03-13

Applicant: QUALCOMM INCORPORATED

Inventor： Yanru Li ,  Dexter Chun ,  William Kimberly

IPC: G06F1/3287 ,  G06F12/02 ,  G06F13/40 ,  G06F13/16 ,  G06F1/3234 ,  G06F1/3221 ,  G06F1/3225 ,  G06F9/50

Abstract: Systems, methods, and computer programs are disclosed for providing power-efficient file system operation to a non-volatile block memory. An exemplary embodiment of a system comprises a non-volatile block memory having a file system, a dynamic random access memory (DRAM), and a system on chip (SoC). The SoC comprises a central processing unit (CPU), one or more non-core processors, a DRAM controller, a data interface coupled to an off-chip processor, and a multi-host storage controller. The CPU allocates a storage buffer in the non-volatile block memory. The multi-host storage controller comprises a virtualized client interface for providing the non-core and off-chip processors with direct read/write file system access using the allocated storage buffer while the CPU and the DRAM are in a low power state.

公开(公告)号：US20180260320A1

公开(公告)日：2018-09-13

申请号：US15457899

申请日：2017-03-13

Applicant: QUALCOMM INCORPORATED

Inventor： Yanru Li ,  Dexter Chun ,  William Kimberly

IPC: G06F12/02 ,  G06F13/40 ,  G06F13/16 ,  G06F1/32

CPC classification number: G06F12/0246 ,  G06F1/3221 ,  G06F1/3225 ,  G06F1/3275 ,  G06F1/3287 ,  G06F9/5016 ,  G06F9/5094 ,  G06F13/1673 ,  G06F13/4068 ,  G06F2212/7201 ,  Y02D10/14 ,  Y02D10/151 ,  Y02D10/22

Abstract: Systems, methods, and computer programs are disclosed for providing power-efficient file system operation to a non-volatile block memory. An exemplary embodiment of a system comprises a non-volatile block memory having a file system, a dynamic random access memory (DRAM), and a system on chip (SoC). The SoC comprises a central processing unit (CPU), one or more non-core processors, a DRAM controller, a data interface coupled to an off-chip processor, and a multi-host storage controller. The CPU allocates a storage buffer in the non-volatile block memory. The multi-host storage controller comprises a virtualized client interface for providing the non-core and off-chip processors with direct read/write file system access using the allocated storage buffer while the CPU and the DRAM are in a low power state.