公开(公告)号：US20160056245A1

公开(公告)日：2016-02-25

申请号：US14930628

申请日：2015-11-02

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： YUSUKE KINOSHITA ,  SATOSHI TAMURA ,  TETSUZO UEDA

IPC: H01L29/205 ,  H01L29/66 ,  H01L29/808

CPC classification number: H01L29/205 ,  H01L29/1066 ,  H01L29/2003 ,  H01L29/201 ,  H01L29/432 ,  H01L29/66462 ,  H01L29/66916 ,  H01L29/66924 ,  H01L29/7786 ,  H01L29/8086

Abstract: A semiconductor device includes: a channel layer which is made of InpAlqGa1-p-qN (0≦p+q≦1, 0≦p, and 0≦q); a barrier layer which is formed on the channel layer and is made of InrAlsGa1-r-sN (0≦r+s≦1, 0≦r) having a bandgap larger than that of the channel layer; a diffusion suppression layer which is selectively formed on the barrier layer and is made of IntAluGa1-t-uN (0≦t+u≦1, 0≦t, and s>u); a p-type conductive layer which is formed on the diffusion suppression layer and is made of InxAlyGa1-x-yN (0≦x+y≦1, 0≦y) having p-type conductivity; and a gate electrode which is formed on the p-type conductive layer.

Abstract translation: 半导体器件包括：由InpAlqGa1-p-qN（0＆nlE; p + q＆nlE; 1,0＆amp; nlE; p和0＆nlE; q）制成的沟道层; 阻挡层，其形成在沟道层上，并且由InrAlsGa1-r-sN（0＆lt; nlE; r + s＆nlE; 1,0＆amp; nlE; r）制成，其带隙大于沟道层的带隙; 扩散抑制层，其被选择性地形成在阻挡层上并由IntAluGa1-t-uN（0＆lt; nlE; t + u＆nlE; 1,0＆amp; nlE; t和s> u）制成; p型导电层，其形成在扩散抑制层上，由具有p型导电性的In x Al y Ga 1-x-y N（0＆lt; n 1; x + y＆nlE; 1,0＆amp; 以及形成在p型导电层上的栅电极。

公开(公告)号：US20230082396A1

公开(公告)日：2023-03-16

申请号：US17904384

申请日：2021-02-16

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： YUSUKE KINOSHITA ,  HIDETOSHI ISHIDA

IPC: H03K17/082

Abstract: Provided are a determination device and a switch system capable of suppressing a power loss of a semiconductor switch. Determination device is used for semiconductor switch. Semiconductor switch includes junction field-effect transistor having gate and source corresponding to gate. Determination device includes resistor and determination circuit. Resistor has a first end and a second end. The first end of resistor is connected to gate. Determination circuit determines that overcurrent is flowing through semiconductor switch when there is a predetermined change in gate-source voltage of junction field-effect transistor in a range smaller than gate drive voltage provided between the second end of resistor and source.

公开(公告)号：US20230336171A1

公开(公告)日：2023-10-19

申请号：US17998658

申请日：2021-04-05

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： YUSUKE KINOSHITA ,  YUTA NAGATOMI ,  RYOSUKE MAEDA ,  SATOSHI NAKAZAWA

IPC: H03K17/082

CPC classification number: H03K17/0822

Abstract: A power loss of a switching device is suppressed. Circuit for a switching device is used in switching device. Switching device includes first path and second path. First path includes first field effect transistor and first inductor. Second path includes second field effect transistor and second inductor. First path and second path are connected in parallel to power supply. A first maximum current that is a maximum current during conduction of first field effect transistor is smaller than a second maximum current that is a maximum current during conduction of second field effect transistor. Circuit for a switching device includes processing part. Processing part executes a specific operation according to a voltage difference between voltage across first inductor and voltage across second inductor.

公开(公告)号：US20230231018A1

公开(公告)日：2023-07-20

申请号：US18001864

申请日：2021-04-13

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： YUSUKE KINOSHITA ,  MASANORI NOMURA ,  SATOSHI NAKAZAWA

IPC: H01L29/20 ,  H01L29/778

CPC classification number: H01L29/2003 ,  H01L29/7787

Abstract: Current collapse of a normally-on type dual-gate bidirectional switch is suppressed. Dual-gate bidirectional switch includes first gate, first source, second gate, and second source. Control system includes first gate drive circuit, second gate drive circuit, and controller. Controller controls first gate drive circuit and second gate drive circuit. At the time of turning on dual-gate bidirectional switch and when the potential of first source is lower than the potential of second source, controller applies a first positive voltage for a first period between first gate and first source from first gate drive circuit, and applies a voltage smaller than the first positive voltage after the first period has elapsed.

公开(公告)号：US20220385196A1

公开(公告)日：2022-12-01

申请号：US17755574

申请日：2021-01-05

Applicant: Panasonic Intellectual property Management Co., Ltd.

Inventor： RYUSUKE KANOMATA ,  YUSUKE KINOSHITA ,  HIDETOSHI ISHIDA

IPC: H02M3/335 ,  H02M1/00

Abstract: A substrate electric potential stabilization circuit is configured to be connected to a bidirectional switch element including a first main electrode, a second main electrode, and a backside electrode. The stabilization circuit includes a first switch connected to the first main electrode and the backside electrode in series between the first main electrode and the backside electrode, a second switch connected to the second main electrode and the backside electrode in series between the second main electrode and the backside electrode, and a through-current prevention circuit configured to prevent the first switch and the second switch from being turned on simultaneously. The substrate electric potential stabilization circuit prevents a through-current flowing in this circuit.