-
公开(公告)号：US11677411B2
公开(公告)日：2023-06-13
申请号：US17442088
申请日：2020-02-28
Inventor： Junji Nakatsuka , Hiroki Yoshino , Jun'ichi Naka , Koji Obata , Masaaki Nagai
Abstract: An A/D converter includes an A/D conversion unit and an output unit. The A/D conversion unit includes a second A/D converter (successive approximation register A/D converter) and generates first digital data having a first number of bits and second digital data having a second number of bits, where the second number of bits is smaller than the first number of bits. The output unit provides first output information that is the first digital data and also provides second output information based on the second digital data. The output unit provides the second output information before providing the first output information.
-
公开(公告)号：US12278647B2
公开(公告)日：2025-04-15
申请号：US18245815
申请日：2021-06-10
Inventor： Jun'ichi Naka , Koji Obata
Abstract: A D/A converting unit generates a comparative voltage corresponding to a target bit falling within a range from a most significant bit through a least significant bit. A comparator determines a value of the target bit by comparing a differential voltage between an output signal of an input switching unit and a comparative voltage generated by the D/A converting unit with a reference voltage. An integrator integrates a conversion error. In a first conversion operation of converting a first signal, a control unit sets, based on a result obtained by the integrator, the reference voltage for use when the first signal to be provided next time as the output signal by the input switching unit is A/D converted. In a second conversion operation of A/D converting a second signal, the control unit sets the reference voltage at a constant voltage level.
-
Patent Agency Ranking
公开(公告)号：US11611349B2
公开(公告)日：2023-03-21
申请号：US17427060
申请日：2020-03-13
Inventor： Koji Obata , Jun'ichi Naka , Junji Nakatsuka , Hiroki Yoshino , Masaaki Nagai
Abstract: Provided are an analog-to-digital (AD) converter, a sensor system, and a test system capable of reducing the time for test processing. AD converter includes input part, AD conversion part, first output part, and second output part. The analog signal output from sensor is input to input part. AD conversion part digitally converts an analog signal to generate first digital data and second digital data. First output part outputs the first digital data to control circuit. Second output part outputs the second digital data to test controller before first output part outputs the first digital data. In the test mode, test controller determines whether or not sensor system including sensor is in an abnormal state on the basis of the second digital data.
-
公开(公告)号：US11031558B2
公开(公告)日：2021-06-08
申请号：US16635021
申请日：2018-08-07
Inventor： Nobuyuki Matsuzawa , Masaru Sasago , Jun'ichi Naka
Abstract: A p-type semiconductor film including heterofullerene having a further sufficiently high hole mobility is provided. The p-type semiconductor film contains heterofullerene in which n+r number (where n and r are both positive odd numbers) of carbon atoms constituting a fullerene are substituted by n number of boron atom or atoms and r number of nitrogen atom or atoms.
-
公开(公告)号：US11664815B2
公开(公告)日：2023-05-30
申请号：US17442303
申请日：2020-02-28
Inventor： Masaaki Nagai , Hiroki Yoshino , Junji Nakatsuka , Jun'ichi Naka , Koji Obata
IPC: H03M3/00
Abstract: A digital filter is used in an A/D converter and includes a first filter and second filter. The first filter outputs first digital data by performing filter processing on output of an A/D conversion unit included in the A/D converter. The second filter outputs second digital data by performing filter processing on the output of the A/D conversion unit. The second digital data has either a lower resolution or a smaller effective number of bits than the first digital data does. The second filter outputs the second digital data before the first filter outputs the first digital data.
-
公开(公告)号：US11518677B2
公开(公告)日：2022-12-06
申请号：US16635011
申请日：2018-08-07
Inventor： Nobuyuki Matsuzawa , Masaru Sasago , Jun'ichi Naka
IPC: C01B32/156 , H01L51/05 , H01L51/52 , H01L51/00 , C01B32/152 , B82Y30/00 , B82Y40/00
Abstract: Provided is a heterofullerene where n number (where n is a positive even number) of carbon atoms constituting a fullerene are substituted by n number of boron atoms or n number of nitrogen atoms.
-
公开(公告)号：US10389317B2
公开(公告)日：2019-08-20
申请号：US15465583
申请日：2017-03-21
Inventor： Toshiaki Ozeki , Jun'ichi Naka
Abstract: A differential amplifier circuit comprises: first and second input terminals; first and second output terminals; a first transistor comprising a gate terminal connected to the first input terminal; a second transistor comprising a gate terminal connected to the second input terminal; a first resistor connected between the source terminal of the first transistor and the source terminal of the second transistor; a third transistor comprising a drain terminal connected to the source terminal of the first transistor, a gate terminal connected to the drain terminal of the first transistor, and a source terminal connected to the first output terminal; a fourth transistor comprising a drain terminal connected to the source terminal of the second transistor, a gate terminal connected to the drain terminal of the second transistor, and a source terminal connected to the second output terminal; first to fourth current sources; and second and third resistors.
-
-
-
-
-
-
Search Results
7
records
(took 0.017 seconds)
