公开(公告)号：US20170269870A1

公开(公告)日：2017-09-21

申请号：US15356778

申请日：2016-11-21

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Hirokazu SO ,  Toshiyuki HONDA

IPC: G06F3/06 ,  G06F12/1009

CPC classification number: G06F3/0652 ,  G06F3/0608 ,  G06F3/061 ,  G06F3/064 ,  G06F3/0679 ,  G06F3/0688 ,  G06F12/0246 ,  G06F12/1009 ,  G06F2212/1016 ,  G06F2212/1024 ,  G06F2212/202 ,  G06F2212/657 ,  G06F2212/7201 ,  G06F2212/7205

Abstract: A memory controller controls a nonvolatile memory having physical blocks. The memory controller includes a control unit and a host interface unit. The control unit writes data into a physical block. The host interface unit receives and transmits data from and to the external device. The control unit manages first vacant blocks and second vacant blocks based on a physical-block management table for managing states of the physical blocks. The first vacant block can be used in garbage collection processing of arranging data stored in the nonvolatile memory. The second vacant block cannot be used in garbage collection processing. The control unit increases a quantity of the second vacant blocks when the control unit does not receive an instruction from the external device. The control unit writes data into the second vacant blocks when the control unit receives an instruction for writing data from the external device.

公开(公告)号：US20160283150A1

公开(公告)日：2016-09-29

申请号：US15079959

申请日：2016-03-24

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Shigekazu KOGITA ,  Hirokazu SO ,  Toshiyuki HONDA

IPC: G06F3/06 ,  G11C16/10 ,  G11C16/26 ,  G11C16/34

CPC classification number: G06F3/0619 ,  G06F3/0653 ,  G06F3/0679 ,  G06F11/00 ,  G11C16/10 ,  G11C16/26 ,  G11C16/3431

Abstract: A non-volatile storage device of the present disclosure includes non-volatile memory configured to have a plurality of areas for storing data, and a memory controller configured to write the data to the non-volatile memory and to read the data from the non-volatile memory. The memory controller includes a memory interface (I/F) connected to the non-volatile memory, a threshold calculator calculating a threshold for the number of error bits of the data based on a storage condition in the case of storing the data in the non-volatile memory without power, and a refresh controller determining whether refresh processing of the data is necessary, based on the threshold and the number of error bits of the data, and executing the refresh processing of the data if the refresh processing of the data is necessary.

Abstract translation: 本公开的非易失性存储装置包括被配置为具有用于存储数据的多个区域的非易失性存储器，以及配置为将数据写入非易失性存储器并从非易失性存储器读取数据的存储器控​​制器， 易失性存储器 存储器控制器包括连接到非易失性存储器的存储器接口（I / F），阈值计算器基于在非数据存储器中存储数据的情况下的存储条件来计算数据的错误位数的阈值 并且刷新控制器基于阈值和数据的错误位数确定是否需要数据的刷新处理，并且如果数据的刷新处理是数据的刷新处理，则执行数据的刷新处理 必要。

公开(公告)号：US20190391762A1

公开(公告)日：2019-12-26

申请号：US16441606

申请日：2019-06-14

Applicant: Panasonic Intellectual Property Management Co. Ltd.

Inventor： Shigekazu KOGITA ,  Toshiyuki HONDA ,  Hirokazu SO ,  Masato SUTO

IPC: G06F3/06 ,  G06F12/10 ,  G06F12/02

Abstract: A memory controller includes an address converter configured to convert an address designated by a host device for writing and reading into a physical address of a non-volatile memory, and an invalid-area manager configured to manage an invalid area of the non-volatile memory, the address converter making no reference to the invalid area, and, upon receipt of an invalid-data read command from the host device, data in the invalid area, managed by the invalid-area manager, of the non-volatile memory is output to the host device.

公开(公告)号：US20160283163A1

公开(公告)日：2016-09-29

申请号：US15079901

申请日：2016-03-24

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Hirokazu SO ,  Toshiyuki HONDA ,  Shigekazu KOGITA

IPC: G06F3/06

CPC classification number: G06F3/0679 ,  G06F3/0616 ,  G06F3/064 ,  G06F12/0246

Abstract: A memory controller includes: a memory that holds a physical block counter including the number of erase times, a logical block counter including the number of write times, and a logical-physical conversion table; and a control unit that writes data to any physical block address. When the control unit receives a writing data instruction, the control unit updates the number of write times corresponding to the write destination logical block address, if the number of write times corresponding to the write destination logical block address is large, the control unit allocates to the write destination logical block address a physical block address with the number of erase times which is small among spare blocks not allocated to the logical block addresses in the logical-physical conversion table, updates the number of erase times corresponding to the allocated physical block address, and updates the logical-physical conversion table.

Abstract translation: 存储器控制器包括：保存包括擦除次数的物理块计数器的存储器，包括写入次数的逻辑块计数器和逻辑 - 物理转换表; 以及将数据写入任何物理块地址的控制单元。 当控制单元接收到写入数据指令时，如果与写入目的地逻辑块地址相对应的写入次数较大，则控制单元更新与写入目的地逻辑块地址相对应的写入次数，控制单元分配 写入目的地逻辑块以不分配给逻辑 - 物理转换表中的逻辑块地址的备用块中具有小的擦除次数的物理块地址来更新与分配的物理块地址相对应的擦除次数 ，并更新逻辑 - 物理转换表。

公开(公告)号：US20150149690A1

公开(公告)日：2015-05-28

申请号：US14611784

申请日：2015-02-02

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Takuji MAEDA ,  Masayuki TOYAMA ,  Hirokazu SO

IPC: G06F3/06

CPC classification number: G06F3/0613 ,  G06F3/064 ,  G06F3/0659 ,  G06F3/0679 ,  H04N5/907 ,  H04N5/91

Abstract: A recording device operates in accordance with an instruction from an access device. The recording device comprising a nonvolatile memory that stores data, a communication unit that receives an instruction issued by the access device, and a memory controller that controls the nonvolatile memory. When a recording instruction for recording data into the nonvolatile memory is received from the access device, the memory controller starts recording of data into the nonvolatile memory. When the memory controller receives from the access device a suspension instruction for suspending the recording of data, the memory controller stores suspension information into the nonvolatile memory, the suspension information indicating a suspended position as a position in a recording area of the nonvolatile memory at which the data is being recorded upon reception of the suspension instruction.

Abstract translation: 记录装置根据来自接入装置的指令进行操作。 所述记录装置包括存储数据的非易失性存储器，接收由所述存取装置发出的指令的通信单元以及控制所述非易失性存储器的存储器控​​制器。 当从存取装置接收到用于将数据记录到非易失存储器中的记录指令时，存储器控制器开始将数据记录到非易失性存储器中。 当存储器控制器从访问装置接收到用于暂停数据记录的暂停指令时，存储器控制器将暂停信息存储到非易失性存储器中，暂停信息指示暂停位置作为非易失性存储器的记录区域中的位置， 在接收到暂停指令时正在记录数据。