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公开(公告)号：US20140181372A1
公开(公告)日：2014-06-26
申请号：US13802770
申请日：2013-03-14
Applicant: PHISON ELECTRONICS CORP.
Inventor： Shao-Hsien Liu
IPC: G06F12/02
CPC classification number: G06F12/0246 , G06F12/0862 , G06F2212/6022 , G06F2212/6026 , G06F2212/7201 , G06F2212/7203
Abstract: A data reading method, a memory controller, and a memory storage device are provided. The data reading method is adapted to a rewritable non-volatile memory module having a plurality of physical erasing units. The data reading method includes following steps. A plurality of logical addresses is configured to be mapped to a part of the physical erasing units. A plurality of read commands is received from a host system. The read commands instruct to read a plurality of first logical addresses among aforementioned logical addresses. The read commands are executed, and whether the first logical addresses are successive is determined. If the first logical addresses are successive, data belonging to a logical range is pre-read from the physical erasing units into a buffer memory. Thereby, the data reading speed is increased.
Abstract translation: 提供数据读取方法，存储器控制器和存储器存储装置。 数据读取方法适用于具有多个物理擦除单元的可重写非易失性存储器模块。 数据读取方法包括以下步骤。 多个逻辑地址被配置为映射到物理擦除单元的一部分。 从主机系统接收多个读取命令。 读取命令指示在上述逻辑地址之间读取多个第一逻辑地址。 执行读命令，确定第一逻辑地址是否连续。 如果第一逻辑地址是连续的，则属于逻辑范围的数据从物理擦除单元被预先读取到缓冲存储器中。 因此，数据读取速度增加。
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Patent Agency Ranking
公开(公告)号：US10956074B2
公开(公告)日：2021-03-23
申请号：US15798370
申请日：2017-10-30
Applicant: PHISON ELECTRONICS CORP.
Inventor： Shao-Hsien Liu , Chien-Han Kuo
Abstract: A data storage method is provided according to an exemplary embodiment of the disclosure. The method is configured for a rewritable non-volatile memory module. The method includes: performing a data merge operation; adjusting a data receiving amount per unit time for receiving to-be-written data from a host system according to a data storage state of the rewritable non-volatile memory module; storing the received to-be-written data into a buffer memory during the data merge operation being performed; and storing the data stored in the buffer memory into the rewritable non-volatile memory module.
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公开(公告)号：US11086564B2
公开(公告)日：2021-08-10
申请号：US15788809
申请日：2017-10-20
Applicant: PHISON ELECTRONICS CORP.
Inventor： Shao-Hsien Liu
Abstract: A temperature control method is provided according to an exemplary embodiment of the invention. The method includes: sensing a temperature by a temperature sensor and obtaining a temperature value; performing a cooling-down operation based on a first cooling-down level and updating a level parameter to a first level parameter if the temperature value reaches a first threshold value; and performing the cooling-down operation based on a second cooling-down level according to the first level parameter and updating the level parameter to a second level parameter if the temperature value is not less than the first threshold value during a first time range after the cooling-down operation based on the first cooling-down level is performed, and a cooling-down ability of the cooling-down operation performed based on the second cooling-down level is higher than a cooling-down ability of the cooling-down operation performed based on the first cooling-down level.
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公开(公告)号：US20190065097A1
公开(公告)日：2019-02-28
申请号：US15798370
申请日：2017-10-30
Applicant: PHISON ELECTRONICS CORP.
Inventor： Shao-Hsien Liu , Chien-Han Kuo
IPC: G06F3/06
Abstract: A data storage method is provided according to an exemplary embodiment of the disclosure. The method is configured for a rewritable non-volatile memory module. The method includes: performing a data merge operation; adjusting a data receiving amount per unit time for receiving to-be-written data from a host system according to a data storage state of the rewritable non-volatile memory module; storing the received to-be-written data into a buffer memory during the data merge operation being performed; and storing the data stored in the buffer memory into the rewritable non-volatile memory module.
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公开(公告)号：US20190050166A1
公开(公告)日：2019-02-14
申请号：US15788809
申请日：2017-10-20
Applicant: PHISON ELECTRONICS CORP.
Inventor： Shao-Hsien Liu
IPC: G06F3/06
Abstract: A temperature control method is provided according to an exemplary embodiment of the invention. The method includes: sensing a temperature by a temperature sensor and obtaining a temperature value; performing a cooling-down operation based on a first cooling-down level and updating a level parameter to a first level parameter if the temperature value reaches a first threshold value; and performing the cooling-down operation based on a second cooling-down level according to the first level parameter and updating the level parameter to a second level parameter if the temperature value is not less than the first threshold value during a first time range after the cooling-down operation based on the first cooling-down level is performed, and a cooling-down ability of the cooling-down operation performed based on the second cooling-down level is higher than a cooling-down ability of the cooling-down operation performed based on the first cooling-down level.
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公开(公告)号：US09304900B2
公开(公告)日：2016-04-05
申请号：US13802770
申请日：2013-03-14
Applicant: PHISON ELECTRONICS CORP.
Inventor： Shao-Hsien Liu
CPC classification number: G06F12/0246 , G06F12/0862 , G06F2212/6022 , G06F2212/6026 , G06F2212/7201 , G06F2212/7203
Abstract: A data reading method, a memory controller, and a memory storage device are provided. The data reading method is adapted to a rewritable non-volatile memory module having a plurality of physical erasing units. The data reading method includes following steps. A plurality of logical addresses is configured to be mapped to a part of the physical erasing units. A plurality of read commands is received from a host system. The read commands instruct to read a plurality of first logical addresses among aforementioned logical addresses. The read commands are executed, and whether the first logical addresses are successive is determined. If the first logical addresses are successive, data belonging to a logical range is pre-read from the physical erasing units into a buffer memory. Thereby, the data reading speed is increased.
Abstract translation: 提供数据读取方法，存储器控制器和存储器存储装置。 数据读取方法适用于具有多个物理擦除单元的可重写非易失性存储器模块。 数据读取方法包括以下步骤。 多个逻辑地址被配置为映射到物理擦除单元的一部分。 从主机系统接收多个读取命令。 读取命令指示在上述逻辑地址之间读取多个第一逻辑地址。 执行读命令，确定第一逻辑地址是否连续。 如果第一逻辑地址是连续的，则属于逻辑范围的数据从物理擦除单元被预先读取到缓冲存储器中。 因此，数据读取速度增加。
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