公开(公告)号：US20240203654A1

公开(公告)日：2024-06-20

申请号：US18555475

申请日：2022-03-22

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Yosuke HAGIHARA ,  Kazushi YOSHIDA

IPC: H01G4/228 ,  H01G4/33

CPC classification number: H01G4/228 ,  H01G4/33

Abstract: A capacitor includes a silicon substrate, a first terminal, a dielectric layer, a conductive portion, and a second terminal. The silicon substrate has a principal surface and a porous part. The principal surface includes an opening region and a non-opening region other than the opening region. The porous part has an opening in the opening region. The first terminal is electrically connected to the silicon substrate. The dielectric layer is formed on an inner surface of the porous part. The conductive portion is filled, on the dielectric layer, in the porous part. The second terminal is electrically connected to the conductive portion. At least one of the first terminal or the second terminal overlaps at least part of the porous part in the normal direction of the principal surface.

公开(公告)号：US20230178627A1

公开(公告)日：2023-06-08

申请号：US17911077

申请日：2021-01-22

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Kazushi YOSHIDA ,  Yosuke HAGIHARA

IPC: H01L29/66 ,  H01L29/94 ,  H01L29/06

CPC classification number: H01L29/66181 ,  H01L29/945 ,  H01L29/0665

Abstract: A capacitor includes a silicon substrate, a conductor layer, and a dielectric layer. The silicon substrate has a principal surface including a capacitance generation region and a non-capacitance generation region. The silicon substrate includes a porous part provided in a thickness direction in the capacitance generation region. The conductor layer includes a surface layer part at least covering part of a surface of the capacitance generation region and a filling part filled in at least part of the porous part. The dielectric layer is provided between an inner surface of the porous part and the filling part. The porous part includes a macroporous part having macro pores and a nanoporous part formed in at least part of inner surfaces of the macro pores and having nano pores smaller than the macro pores.

公开(公告)号：US20210279561A1

公开(公告)日：2021-09-09

申请号：US17254669

申请日：2019-06-19

Applicant: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.

Inventor： Kazushi YOSHIDA ,  Hiroki YOSHINO ,  Miori HIRAIWA ,  Susumu FUKUSHIMA

IPC: G06N3/063 ,  G06N3/08

Abstract: A computational processing system includes an input unit, an output unit, and a computing unit. The input unit receives a plurality of detection signals from a sensor group that is a set of a plurality of sensors. The output unit outputs two or more types of physical quantities out of multiple types of physical quantities included in the plurality of detection signals. The computing unit computes, based on the plurality of detection signals received by the input unit, the two or more types of physical quantities by using a learned neural network.