公开(公告)号：US20210279561A1

公开(公告)日：2021-09-09

申请号：US17254669

申请日：2019-06-19

Applicant: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.

Inventor： Kazushi YOSHIDA ,  Hiroki YOSHINO ,  Miori HIRAIWA ,  Susumu FUKUSHIMA

IPC: G06N3/063 ,  G06N3/08

Abstract: A computational processing system includes an input unit, an output unit, and a computing unit. The input unit receives a plurality of detection signals from a sensor group that is a set of a plurality of sensors. The output unit outputs two or more types of physical quantities out of multiple types of physical quantities included in the plurality of detection signals. The computing unit computes, based on the plurality of detection signals received by the input unit, the two or more types of physical quantities by using a learned neural network.

公开(公告)号：US20220173746A1

公开(公告)日：2022-06-02

申请号：US17442088

申请日：2020-02-28

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Junji NAKATSUKA ,  Hiroki YOSHINO ,  Jun'ichi NAKA ,  Koji OBATA ,  Masaaki NAGAI

IPC: H03M1/14 ,  H03M1/38 ,  H03M3/00

Abstract: An A/D converter includes an A/D conversion unit and an output unit. The A/D conversion unit includes a second A/D converter (successive approximation register A/D converter) and generates first digital data having a first number of bits and second digital data having a second number of bits, where the second number of bits is smaller than the first number of bits. The output unit provides first output information that is the first digital data and also provides second output information based on the second digital data. The output unit provides the second output information before providing the first output information.

公开(公告)号：US20220158652A1

公开(公告)日：2022-05-19

申请号：US17442303

申请日：2020-02-28

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Masaaki NAGAI ,  Hiroki YOSHINO ,  Junji NAKATSUKA ,  Jun'ichi NAKA ,  Koji OBATA

IPC: H03M3/00

Abstract: A digital filter is used in an A/D converter and includes a first filter and second filter. The first filter outputs first digital data by performing filter processing on output of an A/D conversion unit included in the A/D converter. The second filter outputs second digital data by performing filter processing on the output of the A/D conversion unit. The second digital data has either a lower resolution or a smaller effective number of bits than the first digital data does. The second filter outputs the second digital data before the first filter outputs the first digital data.