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公开(公告)号：US20240348931A1
公开(公告)日：2024-10-17
申请号：US18299125
申请日：2023-04-12
发明人： Takatoshi Nakata , Hiroki Ui
CPC分类号： H04N23/73 , H04N23/683
摘要： An image sensor comprises a plurality of high sensitivity photoelectric conversion elements, a plurality of low sensitivity photoelectric conversion elements, and a processor for processing signals read out from the plurality of low sensitivity photoelectric conversion elements and the plurality of high sensitivity photoelectric conversion elements, where the processor is configured to read out signals from the plurality of low-sensitivity photoelectric conversion elements multiple times in a single frame after multiple exposures and obtain a plurality of images of low-sensitivity in the single frame at different times.
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公开(公告)号：US20210358994A1
公开(公告)日：2021-11-18
申请号：US17066277
申请日：2020-10-08
发明人： Sang Joo Lee , Rui Wang , Hiroaki Ebihara , Tiejun Dai , Hiroki Ui
IPC分类号： H01L27/146 , H01L27/148 , H04N5/378
摘要： A pixel array includes pixel cells disposed in semiconductor material. Each of the pixel cells includes photodiodes, and a floating diffusion to receive image charge from the photodiodes. A source follower is coupled to the floating diffusion to generate an image signal in response image charge from the photodiodes. Drain regions of first and second row select transistors are coupled to a source of the source follower. A common junction is disposed in the semiconductor material between gates of the first and second row select transistors such that the drains of the first and second row select transistors are shared and coupled together through the semiconductor material of the common junction. The pixel cells are organized into a rows and columns with bitlines.
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公开(公告)号：US20230199341A1
公开(公告)日：2023-06-22
申请号：US17715376
申请日：2022-04-07
发明人： Hiroki Ui , Eiichi Funatsu
IPC分类号： H04N25/704 , H04N25/78 , H04N25/44 , H04N25/77
CPC分类号： H04N25/704 , H04N25/78 , H04N25/44 , H04N25/77
摘要： An image sensor includes a plurality of pixels that is arranged in a matrix and each of which outputs a signal in response to incident light, wherein readout of data can be performed with respect to the plurality of pixels, and simultaneous readout of data of a plurality of columns of pixels can be performed, and at least one pixel of the plurality of columns of pixels to be read simultaneously can be read for phase detection with respect to each of divided sub-pixels. The image sensor is configured to, with n rows as a readout unit where a is an integer of 2 or more, perform readout for at least one sub-pixel of at least one pixel in one readout cycle within the readout unit, perform readout for each pixel including phase detection readout for the other sub-pixel of the at least one pixel in which the at least one sub-pixel has been read in the one readout cycle, in another readout cycle within the readout unit, and end the readout for the readout unit with the n+1 readout cycles.
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公开(公告)号：US20240187751A1
公开(公告)日：2024-06-06
申请号：US18359934
申请日：2023-07-27
发明人： Hiroki Ui , Eiichi Funatsu
IPC分类号： H04N25/51 , H04N25/59 , H04N25/771
CPC分类号： H04N25/51 , H04N25/59 , H04N25/771
摘要： The pixel circuit of the image sensor includes one or more photoelectric conversion elements that generates charges in response to incident light, a first capacitance that receives and stores the charges generated in the one or more photoelectric conversion elements, a second capacitance that is connected to the first capacitance via a switch, and a comparator that compares the amount of charges stored in the first capacitance with a predetermined value. The second capacitance is connected to the first capacitance via the switch, and the pixel circuit includes a comparator that compares the amount of the charges stored in the first capacitance with a predetermined value. When the amount of the charges accumulated in the first capacitance in the comparator is greater than the predetermined value, the switch is turned on and the charges are accumulated by the capacitance that is the sum of the first capacitance and the second capacitance.
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公开(公告)号：US11658202B2
公开(公告)日：2023-05-23
申请号：US17066200
申请日：2020-10-08
发明人： Tiejun Dai , Hiroaki Ebihara , Sang Joo Lee , Rui Wang , Hiroki Ui
IPC分类号： H04N5/232 , H01L27/146 , H01L27/148 , H04N23/84 , H04N25/13 , H04N25/46 , H04N25/75 , H04N25/77
CPC分类号： H01L27/14645 , H01L27/14612 , H01L27/14641 , H01L27/14812 , H01L27/14831 , H01L27/14868 , H04N23/84 , H04N25/13 , H04N25/46 , H04N25/75 , H04N25/77 , H01L27/14621
摘要： A pixel array includes pixel cells, each including photodiodes. A source follower is coupled to generate an image signal in response image charge generated by the photodiodes. A first row select transistor is coupled to the source follower to output the image signal of the pixel cell. Pixel cells are organized into columns including a first column and a second column. The first row select transistors of the pixel cells of the first and second columns of pixel cells are coupled to first and second column bitlines, respectively. The pixel cells of the second column of pixel cells further include a second row select transistor coupled to the source follower to output the respective image signal to the first column bitline.
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公开(公告)号：US11652131B2
公开(公告)日：2023-05-16
申请号：US17066277
申请日：2020-10-08
发明人： Sang Joo Lee , Rui Wang , Hiroaki Ebihara , Tiejun Dai , Hiroki Ui
IPC分类号： H01L27/146 , H04N5/378 , H04N5/374 , H01L27/148 , H04N9/04 , H04N5/347 , H04N5/3745
CPC分类号： H01L27/14645 , H01L27/14612 , H01L27/14641 , H01L27/14812 , H01L27/14831 , H01L27/14868 , H04N5/347 , H04N5/378 , H04N5/3745 , H04N9/0451 , H04N9/04551 , H01L27/14621
摘要： A pixel array includes pixel cells disposed in semiconductor material. Each of the pixel cells includes photodiodes, and a floating diffusion to receive image charge from the photodiodes. A source follower is coupled to the floating diffusion to generate an image signal in response image charge from the photodiodes. Drain regions of first and second row select transistors are coupled to a source of the source follower. A common junction is disposed in the semiconductor material between gates of the first and second row select transistors such that the drains of the first and second row select transistors are shared and coupled together through the semiconductor material of the common junction. The pixel cells are organized into a rows and columns with bitlines.
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公开(公告)号：US11706537B2
公开(公告)日：2023-07-18
申请号：US17715376
申请日：2022-04-07
发明人： Hiroki Ui , Eiichi Funatsu
IPC分类号： H04N25/704 , H04N25/77 , H04N25/44 , H04N25/78 , H04N25/46
CPC分类号： H04N25/704 , H04N25/44 , H04N25/77 , H04N25/78
摘要： An image sensor includes a plurality of pixels that is arranged in a matrix and each of which outputs a signal in response to incident light, wherein readout of data can be performed with respect to the plurality of pixels, and simultaneous readout of data of a plurality of columns of pixels can be performed, and at least one pixel of the plurality of columns of pixels to be read simultaneously can be read for phase detection with respect to each of divided sub-pixels. The image sensor is configured to, with n rows as a readout unit where n is an integer of 2 or more, perform readout for at least one sub-pixel of at least one pixel in one readout cycle within the readout unit, perform readout for each pixel including phase detection readout for the other sub-pixel of the at least one pixel in which the at least one sub-pixel has been read in the one readout cycle, in another readout cycle within the readout unit, and end the readout for the readout unit with the n+1 readout cycles.
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公开(公告)号：US20210360175A1
公开(公告)日：2021-11-18
申请号：US17066200
申请日：2020-10-08
发明人： Tiejun Dai , Hiroaki Ebihara , Sang Joo Lee , Rui Wang , Hiroki Ui
摘要： A pixel array includes pixel cells, each including photodiodes. A source follower is coupled to generate an image signal in response image charge generated by the photodiodes. A first row select transistor is coupled to the source follower to output the image signal of the pixel cell. Pixel cells are organized into columns including a first column and a second column. The first row select transistors of the pixel cells of the first and second columns of pixel cells are coupled to first and second column bitlines, respectively. The pixel cells of the second column of pixel cells further include a second row select transistor coupled to the source follower to output the respective image signal to the first column bitline.
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